DV - Emulation & FPGA

| South Bay
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Join the most cutting-edge and well-funded hardware startup in Silicon Valley as an Emulation Design Engineer. Our mission is to reimagine silicon and create computing platforms that will transform the industry. You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. We offer a fun, creative and flexible work environment, with a shared vision to build products to change the world.
As an Emulation Design Engineer, you will work with microarchitecture and RTL design team to implement the designs, develop, modify, and/or test hardware needed at the chip-level or block-level. 

Minimum qualifications

  • FPGA and emulator flows and methodologies
  • Verilog and SystemVerilog
  • Emulator platforms (Cadence Palladium), platform bringup, digital design, verification, debugging, and waveform viewers
  • Hardware emulators, such as Palladium, ZeBu, Veloce, or FPGA systems based on Xilinx or Altera FPGAs
  • Vivado, Incisive/VCS, IXCOM, Design Compiler, Synplify, Verdi, or SimVision
  • Emulation methodologies, including in-circuit emulation, hybrid systems, or simulation acceleration
  • Debugging system-level software 
  • Programming skills in C and C++ 
  • Scripting in Python, Tcl, or Perl

Preferred qualifications

  • MS degree in Electrical Engineering or equivalent; 10 years of practical experience
  • Knowledge of CPU microarchitectures
  • Experience in deep submicron process technology nodes is strongly preferred 
  • Knowledge of library cells and optimizations from ARM, TSMC, and other high performance library vendors
  • Solid understanding industry standard tools for FPGA and Emulation platforms

Roles and Responsibilities

  • Drive block and full-chip level emulation (FPGA & emulator), and be responsible for QoR (timing, capacity) and debug
  • Work with CPU microarchitecture and design team to understand specifications and design tradeoffs in pipeline and structure sizing to achieve best-in-class performance and power over 3GHz
  • Synthesize the Verilog RTL and create models and compile them to Cadence Palladium and Protium platforms
  • Develop all aspects of hardware emulator implementation, with emphasis on design partitioning, synthesis, place and route, timing analysis
  • Work on third-party IP integration and system-level debugging
  • Block and system level RTL simulation & design verification
  • Support chip bring up and post silicon debug
  • Work with architects to select targeted kernels for benchmarking functional performance and timing on simulation and emulation platforms, and correlate timing between the two platforms
  • Perform feasibility studies to validate performance, functionality, and timing on emulation and simulation platforms
  • Debug functional and timing models
  • Validate the designs for functional and electrical robustness

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Location

Our company is located near the Mission College campus. With ample restaurants, shops and a movie theater walking distance from the entrance.

An Insider's view of NUVIA Inc.

What are some social events your company does?

I love how open, friendly and supportive everyone is at NUVIA. A few of my favorite things about working here are the virtual happy hours to help employees get to know each other better, many of whom have never met in person due to the pandemic, and the focus on health and wellness with virtual exercise classes offered multiple times a week.

Anupama

SoC Design Verification engineer

What does your typical day look like?

The underpinnings of the NUVIA team is the shared commitment we all have to challenge the status quo. NUVIA is a place where candidates are carefully chosen not just for their best-in-class technical talent but also for sharing the same passion, insatiable desire and innovative spirit to go off and do something extraordinary.

Sriram

Product Marketing Lead

What are NUVIA Inc. Perks + Benefits

Health Insurance & Wellness Benefits
Dental Benefits
Vision Benefits
Health Insurance Benefits
Team workouts
NUVIA offers multiple virtual workout classes a week for employees to attend while working from home during the pandemic.
Retirement & Stock Options Benefits
401(K)
Vacation & Time Off Benefits
Paid Holidays
Perks & Discounts
Casual Dress
Happy Hours
Currently we host happy hours virtually.
Professional Development Benefits
Lunch and learns
Acme Co. hosts lunch and learn meetings once per month.
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