Join the most cutting-edge and well-funded hardware startup in Silicon Valley as an SOC Design Verification Engineer. Our mission is to reimagine silicon and create computing platforms that will transform the industry. You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. We offer a fun, creative and flexible work environment, with a shared vision to build products to change the world.
As a Formal Verification Engineer you will help set up methodologies, develop verification plans, and formally verify complex designs and protocols that meets the highest quality standards. We believe in the early involvement of FV and will provide the opportunity to work on some of the most challenging verification tasks in the industry. There will be plenty of opportunity to learn and apply cutting edge formal techniques to high performance SOC designs.
Minimum Requirements
- BA/BS degree in Electrical Engineering with 10+ years of practical experience
- Strong fundamentals in digital ASIC verification; experience using Verilog.
- Strong Formal background/experience using FV techniques to verify complex micro-architectures.
- Experience in writing assertions in SVA
- Strong programmable language experience is required (one or more of Verilog,
- SystemVerilog, Perl, Python, Tcl Scripts, Makefile and/or C++)
Preferred Requirements
- MS/Ph.D degree in Electrical Engineering; 7 years of practical experience
- A good understanding of the complete verification life cycle
- Strong foundation in formal techniques
- Domain knowledge in one or more of these areas: SOC Fabric, memory controller, encryption, caches, coherence, MMU, high speed interfaces/protocols, security protocol
Roles and Responsibilities
- Define verification architecture, develop test plans and build verification environment
- Work with design team to understand design intent and bring up verification plans and schedules
- Verify using advanced verification methodologies
- Assist in emulation, FPGA, prototyping efforts
- Assist in silicon bring-up, debug and characterization