Join the most cutting-edge and well-funded hardware startup in Silicon Valley as a SoC Security Architect. Our mission is to create computing platforms that will transform the industry. You will have the opportunity to work with some of the finest talent in the world, on architectures that push the envelope on security, performance, energy efficiency and scalability. We offer a fun and creative work environment, with the focus and drive to succeed.

As a security architect, you will define the platform and SoC level security technologies for a wide breadth of domains including but not limited to cryptographic HW functions, DRAM encryption, virtualization, isolation/sandboxing, life cycle management, secure boot & debug. In addition, you will work with SoC architects to influence chip architecture to maximize overall PPA efficiency while striving highest security assurance.

Minimum qualifications

• BS/MS/PhD in Computer Science/Computer Engineering/Electrical Engineer with more than 5 years experience in SoC security architecture
• Strong understanding of one or more security technologies like ARM TrustZone, Intel TXT, SGX and AMD SEV technologies
• Strong understanding of cryptographic algorithms and protocols
• Good understanding of secure boot and firmware update technologies
• Ability to independently identify, troubleshoot and solve problems

Preferred qualifications

• MS degree in Electrical Engineering/Computer Science; 10 years of practical experience
• Familiarity with SoC security technologies for client and server spaces
• Experience with architecture and design of HW cryptographic accelerators
• Familiarity with Hypervisor designs and virtualization technologies

Role and Responsibilities

• Define memory encryption architecture and microarchitecture 
• Define microarchitecture of the security subsystem and cryptographic HW accelerators
• Assess PPA trade-offs for various optimization proposals
• Define boot and debug security architectures
• Define device life cycle and key provisioning architectures
• Deliver relevant security architecture specification sections to broader teams and define requirements for subsystem architects