Wireless SoC Low Power Design Engineer

| Sunnyvale, CA, USA
Apply
By clicking Apply Now you agree to share your profile information with the hiring company.

Summary

Come join Apple's growing wireless silicon development team. Our wireless SOC organization is responsible for all aspects of wireless silicon development. With a particular emphasis on highly energy-efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture, and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering.

If you enjoy a fast-paced and challenging environment and collaborating with people across different functional areas as well as thriving during crisis times, we encourage you to apply.

Key Qualifications

5+ years of experiences in Low Power ASIC design and SOC integration

Proficiency in ASIC logic design

Extensive experience with SoC power management design including power gating, isolation, retention and DVFS techniques

SoC level clock mesh / reset design experience desirable

Proficiency in scripting languages (Shell and Perl highly desirable, Python skills are a plus)

Deep understanding of ASIC low power design techniques, e.g. Power analysis, UPF, VCLP

Hands on experience with PTPX and Power Artist power analysis tools is a plus

System architecture knowledge is a bonus

Silicon validation / power measurement experience is a plus

Description

- Drive SoC low power micro-architecture, definition, implementation, and analysis

- Own complex SoC power management, boot flow, clock and reset management

- Write micro-architecture specifications and design specifications

- Design, implement, and debug complex logic designs

- Integrate complex IPs into SoC

- Run tools to ensure lint-free and CDC clean design

- Support all front end design and integration activities such as synthesis and timing constraints

- Support pre and post silicon validation

Education & Experience

BS and 10 years of relevant industry Experience

Read Full Job Description
Apply Now
By clicking Apply Now you agree to share your profile information with the hiring company.

Location

1 Apple Park Way, Cupertino, 95014

Similar Jobs

Apply Now
By clicking Apply Now you agree to share your profile information with the hiring company.
Learn more about AppleFind similar jobs