Jobs at Axiado

Drive embedded computing hardware products from concept through production. Responsibilities include system design, hardware specification, schematic capture using OrCAD, coordination with layout and mechanical engineers, system bring-up, laboratory validation, debugging, test planning, procurement, and cross-functional technical collaboration. The role requires board design expertise, knowledge of low- and high-speed interfaces, power conversion, server subsystems, lab equipment, and engineering validation.

Lead the hardware organization and own TCU embedded-system products from concept through high-volume production. Drive schematic design, lab bring-up, validation, mass-production yields, failure analysis, RMA resolution, supply-chain redesigns, and cross-functional system debugging. Manage senior engineers and contractors, support secure server infrastructure customers, maintain tier-one supplier relationships, and represent the company in OCP and other hardware forums. The role requires deep hands-on circuit design, server-interface, production, and hardware troubleshooting expertise.

Lead finance to scale Axiado from late‑stage R&D to high‑volume semiconductor commercialization: run capital raises, FP&A and cash forecasting, standardize manufacturing costing and inventory accounting, manage vendor reconciliations and supply‑chain finance, upgrade ERP, optimize global tax and R&D credits, and ensure audit and compliance readiness.

Lead all legal matters including corporate governance, board and stockholder affairs, contract negotiation, IP strategy and portfolio management, regulatory and export-control compliance, data protection, cybersecurity controls, risk mitigation, financings, M&A, and oversight of international subsidiaries and local entity compliance.

The Senior Emulation Design Engineer will convert complex SOC designs into emulation environments, validate interoperability with AI servers, and optimize performance. Responsibilities include debugging, integrating IPs, and collaborating with multiple teams.

The Senior FPGA Design Engineer will engage in RTL design, FPGA simulation, system validation, and debug, collaborating with several teams in a fast-paced environment.

Lead product definition and roadmap for the Trusted Control/Compute Unit (TCU) platform across software, firmware, and on-chip AI/ML. Define PRDs and acceptance criteria, drive cross-functional alignment with hardware and engineering, engage hyperscaler and OEM customers on integration, influence standards, support launches, and grow the PM function.

Design, develop, and maintain BMC software solutions, implementing firmware communication, performing code reviews, and preparing documentation.

Lead the design, development, and optimization of secure firmware solutions, focusing on Platform Firmware Resiliency and compliance with security standards. Collaborate with cross-functional teams and mentor engineers in firmware security principles.

As an ASIC Verification Engineer, you will lead RTL SoC verification, develop test plans, and collaborate with various teams to ensure successful chip validation.