Marvell Technology Benefits Overview

Lead digital ASIC design for high-performance connectivity silicon supporting AI data centers. Responsibilities include SoC microarchitecture, SystemVerilog RTL development, ASIC front-end flows, timing and power optimization, subsystem integration, verification strategy, emulation, FPGA prototyping, and silicon bring-up. The role focuses on DSP pipelines, high-speed datapaths, Ethernet protocols, PHY logic, and advanced process nodes while mentoring engineers and driving technical direction.

Owns enterprise endpoint engineering across Windows, mobile, macOS, Linux, VDI, and print environments. Designs and maintains SCCM and Intune management, mobile enrollment, Autopilot provisioning, application packaging, patching, compliance, security baselines, and endpoint performance monitoring. Automates remediation and reporting with PowerShell, Bash, and Python; leads cross-platform initiatives, major incident escalations, standards, runbooks, and continuous improvement. Partners with security, identity, networking, and service delivery teams while mentoring other engineers.

Lead substrate procurement strategy including supplier selection, RFQs, negotiations, contracts, capacity planning, cost-reduction roadmaps, supplier performance management, risk mitigation, NPI procurement, and lead a team of commodity managers and buyers.