Jobs at Marvell Technology

Lead global HR service delivery across self-service, service center, and specialized HR tiers. Standardize processes, SLAs, and KPIs; redesign high-volume employee journeys; drive automation, conversational AI, and integrations (ServiceNow HRSD, Workday, Scout); manage knowledge and case governance; build global teams and vendor partners; and foster service excellence and continuous improvement.

The Lead Analog Design Engineer will design sophisticated wireline transceivers and circuits for data center connectivity, collaborating with global teams and leading architectural investigations, implementations, and verifications of key analog systems.

The role involves SoC microarchitecture, RTL design, full-chip integration, and collaboration with verification teams to ensure performance and functionality of high-performance designs.

The role involves architecting and implementing high-speed analog and mixed-signal circuits for photonic transceivers, collaborating with multidisciplinary teams, defining specifications, and enhancing system performance.

The Principal HRIS Analyst will specialize in HR systems and processes, lead HR technology solutions, and improve operational efficiency using Workday HCM. Responsibilities include managing change processes, supporting data-driven decision-making, and leading HRIS projects.

The Trade Compliance Manager oversees U.S. and international trade compliance, ensuring adherence to regulations and managing compliance programs across Marvell's operations.

Design and verify analog circuits for CMOS transceivers/SERDES products, requiring hands-on experience and innovative problem-solving skills.

Lead and scale Internal and Executive Communications by establishing operating models, managing complex programs end-to-end, improving processes and tools, supporting executive briefings, partnering cross-functionally, and delivering status, risk, and recommendations to communications leadership.

Serve as a strategic HR business partner to senior leaders across Operations, driving workforce planning, organizational design, talent management, leadership coaching, change management, and HR program delivery. Build trusted relationships, lead succession and talent review processes, implement engagement and development initiatives, use data to inform decisions, and support global teams to improve organizational health and performance.

The Senior Staff Engineer will design and implement embedded firmware for high-speed optical components, collaborate with hardware teams, and optimize firmware performance while conducting design reviews and debugging efforts.

The role involves leading firmware development for coherent optical modules, driving cross-functional collaboration, and mentoring engineers, requiring extensive experience in embedded systems.

The role involves supporting Marvell's Optical PAM4 DSP products, interfacing with customers to resolve technical issues, and collaborating with teams to relay customer needs.

The ASIC Architect leads the design and development of SoC architectures, collaborating across teams to deliver innovative solutions while conducting performance analysis and documentation.

The role involves designing and implementing micro-architecture for mixed signal ICs, supervising design engineers, and ensuring high performance in digital signal processing for data centers.

The Senior Communications Leader will shape and execute a global communications strategy, elevate the company's brand, and advise executive leadership while managing media relations and crafting impactful narratives.

Lead and optimize enterprise PLM processes and systems (Agile/Oracle/Teamcenter/Windchill). Manage item/doc creation, BOMs, ECOs, change workflows, data integrity, PLM integrations, testing, user privileges, training, reporting, and PLM metrics to support product lifecycle from development through production and retirement.

Lead NPI test engineering strategy and team for advanced multi-site SoCs. Drive ATE test solutions (Advantest 93K/Teradyne UltraFLEX), define DFT/testability, oversee wafer sort, characterization, and production testing, optimize test programs to reduce time and improve yield, coordinate cross-functional issue resolution, resource planning, program reviews, and standardization to accelerate time-to-market.

The Package Integration Engineer will manage packaging integration, vendor coordination, and ensure project execution from design to manufacturing while analyzing data to improve yields.

The role involves verifying chip circuitry, developing test plans, debugging, and ensuring compliance with specifications for high-speed data transfers.

The Staff Mechanical Design Engineer will lead the design of semiconductor test infrastructures focusing on mechanical architecture, tolerance management, and manufacturability for high power XPU and Silicon Photonics platforms.