Performs electromagnetic, signal integrity, and power integrity simulations for high-speed digital interfaces up to 448Gbps. Analyzes PAM4 and NRZ links, eye diagrams, jitter, noise, S-parameters, PDNs, impedance control, transmission lines, and PCB stack-ups. Develops design guidelines, documents simulation results, correlates simulations with measurements, and collaborates with PCB layout engineers and fabrication vendors on server, data center, and networking hardware.