Jobs at Cornelis Networks

Optimize distributed AI training and inference across CPU/GPU clusters, networking silicon, and software stacks. Benchmark workloads, tune distributed serving and training architectures, analyze communication and system bottlenecks, validate RDMA and collective performance, and create customer-facing proof points. Use profiling and observability tools to visualize performance, compare interconnects, and communicate best practices through technical documentation, publications, and customer engagements.

Lead end-to-end PCIe IP integration into complex ASIC and SoC designs, collaborating across architecture, verification, physical design, software, and external IP vendors. Optimize PCIe performance, contribute to IO and interconnect architecture, and lead silicon bring-up, interoperability testing, and debugging across RTL, gate-level, emulation, and post-silicon environments. Mentor engineers and establish PCIe subsystem development practices for high-performance AI and HPC platforms.

Lead verification closure for complex ASICs and SoCs used in AI and high-performance computing networking. Define verification strategies, develop UVM/SystemVerilog testbenches, execute functional testing, debug RTL failures, and close functional and code coverage. Guide block, subsystem, and SoC verification while collaborating with design, software, emulation, hardware, and post-silicon teams. Mentor engineers, establish verification guidelines, and promote AI tools to improve team productivity.

Design, implement, and operate a private, secure AI platform and autonomous agent workforce for engineering workflows. Build agents (FastAPI/CLI/chat), integrate MCP and RAG, maintain containerized infrastructure, CI/CD validation, secrets and cost management, and enterprise integrations (GitHub, Jira, Confluence, Teams). Continuously evaluate models, improve agent reliability, and drive platform adoption across low-level systems engineering domains.