Teams at Eliyan Corporation

Leads DFT architecture and implementation for chiplets, PHYs, controllers, and 2.5D/3DIC systems. Develops scan, BIST, ATPG, hierarchical test access, die-to-die test, KGD screening, and customer-ready DFT collateral. Partners with digital, analog, physical design, verification, STA, and test engineering teams. Owns DFT tools, constraints, coverage, simulation, post-silicon debug, ATE pattern bring-up, and methodology development.

Own Jenkins-based RTL quality and release-promotion pipelines across lint, CDC, RDC, synthesis, and STA. Build QoR tracking, automated quality gates, waiver management, and evidence generation. Develop LLM-driven tooling to triage violations, create annotated pull requests, check spec-to-RTL consistency, and generate documentation. The role requires strong Python, hardware-flow knowledge, CI/CD expertise, and practical LLM integration experience. It is fully onsite Monday through Friday in the Bay Area, Vancouver, or Toronto.

Lead product strategy and execution for die-level co-packaged optics, selecting and qualifying VCSELs, photodetectors, lenses, and fiber interfaces; define assembly-aware optical specs, drive optical-electrical co-design within foundry constraints, and coordinate cross-functional alignment with silicon, packaging, and marketing teams.