Jobs at Lightmatter

Develop RTL and DFT-aware digital modules for advanced AI accelerator ASICs. Debug complex logic and mixed-signal simulations, integrate silicon photonics with digital designs, and collaborate across architecture, verification, physical design, analog, photonics, and software teams. Drive high-performance, low-power implementations through tape-out, document functionality and timing, and manage technical risks and schedules.

Owns operational programs for photonic hardware from NPI through high-volume manufacturing. Responsibilities include master build planning, multi-tier material readiness, Clear-To-Build tracking, supplier and contract manufacturer execution, Statement of Work governance, milestone and risk management, BOM administration, ECO routing, PLM workflows, and executive status reporting across engineering, quality, commercial, foundry, OSAT, and manufacturing teams.

Own strategic sourcing, supplier governance, contract negotiations, pricing, capacity allocation, and supply assurance across OSATs and Tier-1 contract manufacturers. Develop should-cost models, negotiate MSAs and supply agreements, mitigate supply risks, drive supplier performance, and lead business reviews. Partner with engineering, operations, finance, and program management teams to scale advanced photonic hardware manufacturing while optimizing total cost of ownership.

Provides technical leadership for hardware systems developing silicon photonics AI accelerators and interconnect products. Owns system development from concept through production, including PCBA definition, integration, verification, validation, documentation, and production release. Collaborates across electrical, mechanical, packaging, firmware, photonics, and software teams while mentoring engineers and contributing to technology roadmaps. The role requires deep expertise in VRMs, high-speed SerDes, and hardware interfaces, with preferred experience in AI/HPC infrastructure and photonics products.

Lead verification and characterization of high-speed electro-optic links across silicon and system programs. Responsibilities include lab debugging, electrical and optical channel modeling, link-budget ownership, eye-diagram and BER analysis, silicon bring-up, signal-integrity root-cause investigations, architecture tradeoff guidance, automation development, and engineering mentorship. The role requires deep expertise in high-speed SerDes, photonics, measurement systems, and modeling tools.

Leads system-level electrical design for silicon photonics AI accelerators and interconnect products. Responsibilities include defining hardware requirements, designing power, memory, and high-speed circuits, selecting components, overseeing PCB layouts, validating boards in the lab, ensuring manufacturability, integrating cross-functional systems, and supporting contract manufacturing. The role requires taking products from concept through production and collaborating with mechanical, software, IC, packaging, and supply partners.

Develop and maintain photonics Process Design Kits, including Python-based layout libraries, compact behavioral models, test structures, and automated verification pipelines. Validate models against silicon measurements through data fitting and statistical analysis. Collaborate with multidisciplinary engineering teams to support large-scale photonic integrated circuit tape-outs. The role requires advanced photonic device physics, circuit simulation, Python programming, layout automation, and experience with foundry PDKs and design verification.

Lead product definition, positioning, partnerships, customer design wins, rollouts, pricing, forecasting, and lifecycle management for silicon photonics products. The role focuses on Lightmatter’s Passage interconnect platform, evaluation systems, and photonics-enabled data center solutions, collaborating across engineering, sales, operations, finance, customers, and executives from early development through volume production and end-of-life.

Own the architecture and development of firmware test automation frameworks, hardware-in-the-loop infrastructure, CI/CD integration, diagnostics, telemetry, and test reporting for photonic hardware. Debug failures across firmware, boards, instruments, fixtures, and test software. Define test strategies, improve framework reliability, participate in design reviews, integrate embedded management interfaces, and mentor engineers. The role requires strong Python, embedded C/C++, CI/CD, hardware testing, and automation architecture experience.

Lead verification and characterization of high-speed electro-optic links across silicon and system programs. Perform lab measurements, model electrical and optical channels, own link budgets and verification methodology, and debug signal integrity issues involving eye diagrams, BER, jitter, equalization, and channel impairments. Support silicon bring-up, influence architecture decisions, develop automation tools, and mentor engineers.

Lead hardware bring-up and automated system-level testing for photonic IC products from evaluation through high-volume manufacturing. Responsibilities include ATE hardware integration, electrical bring-up, supplier debugging, test software development in Python or C/C++, power-sequence validation, protocol testing, firmware diagnostic integration, and lab instrumentation control. The role collaborates with IC design, DFT, and firmware teams to isolate silicon and board-level issues.

Provides technical leadership for hardware systems developing silicon photonics-based AI accelerators and interconnect platforms. Owns multiple hardware projects from concept through production, including PCBA definition, system integration, verification, validation, documentation, and production release. Collaborates across electrical, mechanical, packaging, firmware, photonics, software, and IC engineering teams while mentoring engineers and driving technology roadmaps. Requires deep expertise in VRMs, high-speed SerDes, and major hardware interfaces.

Own end-to-end simulation, co-design, and laboratory verification of photonic-electronic links. Develop multi-physics optical and analog models, perform corner, Monte Carlo, and PVT analyses, create link budgets, and correlate simulations with silicon measurements. Partner with photonic and analog circuit teams on architecture, specifications, interface requirements, and corrective design actions. The role requires high-speed optical lab expertise, silicon photonics experience, and proficiency in photonic, mixed-signal, and Python-based simulation workflows.

Owns major enterprise customer accounts and drives the full sales cycle from engagement through deal closure. Responsibilities include developing account strategies, expanding revenue, building executive and technical relationships, positioning complex photonics and data center solutions, forecasting pipeline, leading negotiations, and coordinating cross-functional teams to deliver customer success.

The Staff Mechanical Engineer will focus on mechanical design, structural analysis, GD&T, and FEA to enhance packaging technologies for AI architectures at Lightmatter.

The Physical Design Timing Engineer will drive backend digital execution, focusing on timing constraints, analysis, and closure on advanced CMOS technologies. Responsibilities include STA sign-off, collaborating with multiple teams, managing timing complexities, and automating timing ECO generation.

Design and analyze power delivery networks for high-performance compute SoCs across package and system architectures. Perform electromagnetic, time-domain, and frequency-domain simulations; model regulators; evaluate voltage droop and overshoot; conduct lab measurements; and collaborate with hardware, layout, and systems teams to improve power integrity. Document analyses, support design reviews, monitor layout constraints, and contribute to architectural tradeoff studies.

Drive signal integrity engineering for high-speed photonics and computing products from architecture through lab validation. Analyze PCIe, UCIe, and SerDes channels using S-parameters, eye and jitter analysis, equalization, and simulation tools. Collaborate with hardware and PCB layout teams on impedance, routing, termination, and packaging. Perform measurements with oscilloscopes, VNAs, network analyzers, and TDRs, troubleshoot issues, support design reviews, and document results and guidelines.

Designs IC package substrate layouts for standard and advanced packaging technologies. Responsibilities include package floorplanning, stack-up optimization, signal and power integrity routing, DFM/DFA closure, fab-file generation, supplier and OSAT coordination, package tape-outs, and design automation. The role supports analog, digital, and photonics package architectures, including multi-chiplet and 2.5D/3D packaging solutions.

The Staff Physical Design Engineer will implement digital blocks using advanced tech nodes, focusing on timing closure and power integrity, while collaborating with teams on ASIC design.