Jobs at Lightmatter

Engineering interns support silicon photonics, optical component design, product testing, analog and mixed-signal circuits, laser development, systems integration, digital design, verification, physical design, and firmware. Responsibilities may include board bring-up, simulations, RTL development, ASIC synthesis, timing analysis, and low-level driver development for photonic computing platforms.

Lead hardware bring-up and automated system-level testing for photonic IC products from evaluation through high-volume manufacturing. Responsibilities include ATE hardware integration, electrical bring-up, supplier debugging, test software development in Python or C/C++, power-sequence validation, protocol testing, firmware diagnostic integration, and lab instrumentation control. The role collaborates with IC design, DFT, and firmware teams to isolate silicon and board-level issues.

Design and maintain software that automates photonic chip bring-up, characterization, validation, and production testing across laboratory and ATE environments. Develop test methods, test flows, instrument controls, data pipelines, and hardware integrations. Debug hardware-software issues, support test releases, collaborate with hardware and manufacturing teams, and mentor engineers while owning test software architecture.

Own the digital architecture of Lightmatter’s Passage photonic computing product from concept through high-volume production. Architect system-level digital designs integrating analog, mixed-signal, and photonic circuits, including DSP, FEC, CRC, stabilization, tuning, and adaptation. Collaborate with chip design, RTL, verification, firmware, test, validation, product, and applications teams. Develop specifications, validate prototypes against simulations, support hardware bring-up, and create customer-facing datasheets and reference designs.

Designs and validates end-to-end electro-optic systems for high-volume photonics products. Responsibilities include system modeling with Cadence, VPI Photonics, and Keysight ADS; co-designing silicon photonic devices; developing high-speed RF experiments; testing optical modulators and receivers; analyzing performance, power, and production requirements; and collaborating with electronics and photonics engineering teams.

Provides technical leadership for hardware systems developing silicon photonics-based AI accelerators and interconnect platforms. Owns multiple hardware projects from concept through production, including PCBA definition, system integration, verification, validation, documentation, and production release. Collaborates across electrical, mechanical, packaging, firmware, photonics, software, and IC engineering teams while mentoring engineers and driving technology roadmaps. Requires deep expertise in VRMs, high-speed SerDes, and major hardware interfaces.

Own end-to-end simulation, co-design, and laboratory verification of photonic-electronic links. Develop multi-physics optical and analog models, perform corner, Monte Carlo, and PVT analyses, create link budgets, and correlate simulations with silicon measurements. Partner with photonic and analog circuit teams on architecture, specifications, interface requirements, and corrective design actions. The role requires high-speed optical lab expertise, silicon photonics experience, and proficiency in photonic, mixed-signal, and Python-based simulation workflows.

Owns major enterprise customer accounts and drives the full sales cycle from engagement through deal closure. Responsibilities include developing account strategies, expanding revenue, building executive and technical relationships, positioning complex photonics and data center solutions, forecasting pipeline, leading negotiations, and coordinating cross-functional teams to deliver customer success.

The Staff Mechanical Engineer will focus on mechanical design, structural analysis, GD&T, and FEA to enhance packaging technologies for AI architectures at Lightmatter.

Lead development of the internal photonics PDK: create Python-based pcells, build and verify compact models for active/passive devices, automate parameter extraction from FDTD/FEM solvers, validate models against lab measurements, implement CI/regression testing, and own netlist extraction and connectivity logic to ensure accurate system-level simulation.

The Physical Design Timing Engineer will drive backend digital execution, focusing on timing constraints, analysis, and closure on advanced CMOS technologies. Responsibilities include STA sign-off, collaborating with multiple teams, managing timing complexities, and automating timing ECO generation.

Design and analyze power delivery networks for high-performance compute SoCs across package and system architectures. Perform electromagnetic, time-domain, and frequency-domain simulations; model regulators; evaluate voltage droop and overshoot; conduct lab measurements; and collaborate with hardware, layout, and systems teams to improve power integrity. Document analyses, support design reviews, monitor layout constraints, and contribute to architectural tradeoff studies.

Drive signal integrity engineering for high-speed photonics and computing products from architecture through lab validation. Analyze PCIe, UCIe, and SerDes channels using S-parameters, eye and jitter analysis, equalization, and simulation tools. Collaborate with hardware and PCB layout teams on impedance, routing, termination, and packaging. Perform measurements with oscilloscopes, VNAs, network analyzers, and TDRs, troubleshoot issues, support design reviews, and document results and guidelines.

Designs IC package substrate layouts for standard and advanced packaging technologies. Responsibilities include package floorplanning, stack-up optimization, signal and power integrity routing, DFM/DFA closure, fab-file generation, supplier and OSAT coordination, package tape-outs, and design automation. The role supports analog, digital, and photonics package architectures, including multi-chiplet and 2.5D/3D packaging solutions.

Lead system-level electrical design and integration for silicon photonics AI accelerators. Define hardware requirements, design power/memory/interconnect circuits, oversee PCB layout and manufacturability, validate and qualify electrical properties, perform lab validation, and collaborate with mechanical, IC, software, and manufacturing teams to bring products from concept to production.

Research and model performance of Lightmatter-enabled hardware systems for ML training and inference. Build performance modeling tools, design rack-scale reference platforms, collaborate with product and engineering, publish academic and industry research, and act as the in-house ML systems expert.

The Staff Physical Design Engineer will implement digital blocks using advanced tech nodes, focusing on timing closure and power integrity, while collaborating with teams on ASIC design.

The Photonics Technical Lead will create scalable laser solutions for silicon photonics AI communications, collaborating across teams to ensure design feasibility and meet performance specifications.

Lead development and qualification of silicon foundry processes for integrated photonic AI platforms. Define process flows, collaborate with foundries and design teams, establish yield and reliability metrics, and drive product tapeout through production and lifetime characterization.

The engineer will architect wafer, package, and system level characterization and test strategies for silicon photonics products, and work closely with architecture and design teams, vendors, and validation teams.