The Senior MEMS Design Engineer at nEye.ai is responsible for designing, simulating, and optimizing MEMS devices for optical circuit switches, collaborating with multi-disciplinary teams, and ensuring high manufacturing reliability.

Lead code-first layout design and tapeout of complex Silicon Photonics PICs. Build and maintain a parametric Python function library, automate optical routing, DFT insertion, and full-chip assembly for HVM. Drive DRC/LVS cleanup with Calibre/KLayout, integrate version control and Layout CI, and translate foundry rules into layout constraints to maximize yield.

The role involves failure analysis of MEMS-based optical switches, troubleshooting failures, performing experiments, root-cause analysis, and developing corrective actions while communicating findings effectively.

The role involves developing software for optical test automation, managing data pipelines, collaborating across teams, and enhancing testing efficiency for silicon photonics.

The Electrical Hardware Engineer will develop and validate electronic systems for an optical switching platform, focusing on hardware bring-up, debugging, and integration with MEMS technology.

As a Silicon Photonics Designer, you will develop complex photonic devices, optimize chip designs, test systems, and collaborate cross-functionally.

Responsible for architecting and managing nEye's supply chain, including vendor engagement, materials planning, logistics, and systems implementation for a hardware company.

The MEMS Integration Engineer will coordinate between design teams and foundries, manage MEMS product development, integrate MEMS processes into manufacturing, and enhance device performance and yield.

The Test Engineer will lead silicon photonics system testing, develop methodologies, automate tests, troubleshoot issues, and document findings.

The Test Engineering Lead will oversee the design and execution of test systems for photonics devices, ensuring quality and performance through collaboration and advanced testing methodologies.