Teams at Positron AI

Lead end-to-end DFT/DFx strategy and hands-on implementation for AI inference ASICs: define DFT architecture, integrate into RTL and third-party IP, drive ATPG/BIST/scan verification through tapeout, partner with physical design and external vendors, and support silicon bring-up.

The Senior Software Engineer will develop high-performance software for executing open-source LLMs on custom hardware, focusing on optimizations and efficient libraries primarily in C++.

As an ASIC Design Verification Engineer, you will develop and execute verification strategies for AI inference ASICs, ensuring functional correctness and performance, while collaborating with design and architecture teams.