Teams at Quadric

Support SoC subsystem development, third-party IP integration, and power, performance, and area optimization for Quadric’s edge AI processor. Assist with low-power digital design, timing closure, architecture documentation, debugging, and front-end RTL development using SystemVerilog or Verilog while collaborating with SoC architects and hardware designers.

Own customer evaluations through design wins by porting and optimizing workloads on Quadric’s Chimera GPNPU. Develop custom kernels, profile performance, debug customer implementations, and guide model architecture tradeoffs. Build reusable SDK skills, porting playbooks, benchmark applications, and agentic FDE tooling. Collaborate with engineering and product teams to incorporate customer feedback into the roadmap.

Develop and extend neural network compiler passes targeting Quadric's GPNPU. Debug compilation issues by tracing generated C++ through compiler pipelines, optimize memory movement and hardware utilization, and contribute to IR transformations, code generation, testing, and developer tools. Collaborate with kernel, hardware, and data science teams while gaining hands-on experience in ML compilation and accelerator-aware optimization.