Jobs at SpaceX

As a Senior SOC/ASIC Physical Design Engineer, you will handle physical implementation, collaborate on feasibility studies, resolve design issues, and ensure signoff closures for ASIC designs.

Develop full-chip physical verification flows and perform signoff tasks for ASIC designs. Engage with foundry teams and handle complex verification issues, ensuring design rule compliance and optimization.

The Principal Wi-Fi Software Engineer will drive software development for Starlink's Wi-Fi products, optimize performance, and mentor engineers while enhancing the customer experience globally.

As a Software Engineer for Starlink Mobile, you'll develop real-time software for a satellite network, manage the software lifecycle, and improve user experience. Responsibilities include architecture and code reviews, tool development, and conducting experiments.

As a Physical Design Engineer II, you will develop ACM and physical design flow methodologies, collaborate with teams to resolve design issues, and perform physical implementation steps for ASICs.

Build and operate the internal developer platform and production infrastructure for Starlink. Identify and fix performance bottlenecks, automate systemic fixes, run and secure Kubernetes clusters, improve CI/CD pipelines, optimize SQL and database schemas, and partner with application teams to design long-term infrastructure solutions.

Run full-cycle technical recruiting: source, screen, interview, and onboard candidates. Partner with hiring managers, coordinate onsite candidate experience and tours, manage offers, background checks, and negotiate packages in a fast-paced, on-site environment.

Lead sourcing strategy for software and services categories, drive cost savings and supplier performance, negotiate complex global contracts, author and manage contracts/SOWs, perform advanced financial and market analysis, manage stakeholder and change initiatives, and handle tactical purchasing and supplier KPI programs to optimize indirect SG&A spend.

Serve as the company's technical expert in 3GPP RAN working groups, driving and defending contributions for 5G/6G (including NTN), translating standards into engineering requirements, coordinating across teams, tracking release timelines, and communicating outcomes internally and to partners.

Lead digital ASIC verification at block and system levels: author and execute test plans, develop test harnesses and regressions, drive coverage closure, support pre-silicon verification, chip bring-up and post-silicon validation, and collaborate with cross-disciplinary teams to verify complex designs.

Develop and execute digital ASIC verification at block and system levels. Create SystemVerilog/UVM and non-UVM testbenches, write test plans, run regressions, close coverage, automate test generation with Python and MATLAB, and support pre-silicon, chip bring-up and post-silicon validation.

Develop RF front-end modules for Starlink Mobile network, including design, simulation, fabrication, testing, and optimization of multi-chip modules containing RF components.

Develop and optimize Wi‑Fi software for Starlink customer equipment: drive roadmap, debug and optimize kernel-level networking performance, improve mesh behavior, collaborate with RF/EE, build CI/test/deployment tools, and mentor engineers.

Lead development of Starlink Wi‑Fi software: drive roadmap, debug and optimize kernel-level performance, improve mesh and embedded networking, collaborate with RF/EE, build CI/CD tools, and mentor engineers.

The Principal Software Engineer will design and build a new CDN for Starlink, scaling distributed systems, optimizing performance, and participating in system architecture reviews.

Source passive technical candidates across multiple channels, build and maintain talent pipelines for engineering and manufacturing roles, conduct initial outreach and phone screens, partner with recruiters and hiring managers, track sourcing metrics, and represent SpaceX while staying current on market trends and compensation benchmarks.

Lead product and commercial strategy for Starlink Enterprise high-speed connectivity. Improve pricing, integrate new hardware/services, support sales engagements, create technical and commercial enablement, partner with cross-functional teams, oversee training, and represent Starlink at events to drive revenue and adoption.

Lead product and commercial strategy for Starlink Maritime by improving pricing, product, and go-to-market approaches for maritime segments. Support hardware/service integrations, enable sales with technical/commercial collateral and training, engage customers and partners, coordinate cross-functional teams, consult on GTM processes, and represent Starlink at global events. Frequent travel and onsite presence required.

Develop and verify DFT for next-generation ASICs: evaluate scan insertion readiness, integrate and verify DFT/IP, run ATPG and gate-level simulations, create post-silicon ATPG content, and collaborate with physical design, ATPG, and manufacturing teams to ensure high scan coverage in silicon.

Lead validation and optimization of 4G/5G RAN software: develop CI/CD test automation for eNB/gNB, analyze UE and network logs to debug RAN issues, build tools and pipelines to optimize RAN performance, and manage lab infrastructure and issue resolution with development teams.