Teams at Altera (altera.com)

Develops and validates manufacturing test content for FPGAs to detect defects, improve test coverage and yield, and optimize test time and cost. Responsibilities include DFT strategy, scan insertion, MBIST, ATPG, test pattern development, RTL integration, pre-silicon simulation, silicon failure analysis, customer return investigation, and collaboration with manufacturing and test teams.

Lead the architecture, deployment, operation, security, automation, and optimization of AWS infrastructure for enterprise and semiconductor engineering workloads. Build Terraform-based infrastructure and CI/CD automation, manage reliability and incident response, implement governance and cost optimization, and support hybrid connectivity. Architect and operate HPC clusters, batch environments, and high-throughput shared storage, optimizing compute, networking, performance, resilience, and capacity for engineering teams.

Designs, integrates, validates, and debugs FPGA RTL systems for embedded, networking, SmartNIC, and acceleration applications. Responsibilities include integrating PCIe, Ethernet, EMIF, and ARM HPS IP; supporting board bring-up and system validation; developing software abstractions and drivers; collaborating on hardware/software co-development; optimizing performance; and contributing to FPGA-based product architecture, deployment, and customer investigations.