The WiFi FEM Product Manager will lead business strategy, manage product roadmaps, ensure market share, and work closely with R&D and sales teams.

Design and engineer complex flip-chip BGA packages for ASICs with high-speed SerDes while managing multiple projects and collaborating across teams.

The candidate will manage supplier relationships, streamline supply chains, secure capacities from foundries, negotiate pricing, and lead teams effectively.

Responsible for developing embedded firmware on an ARM processor for PCIe switches, collaborating with test and silicon teams, and troubleshooting firmware on new hardware.

The Design Automation Engineer develops and supports automation flows for ASIC products and associated IPs, addressing verification issues and improving design processes.

The role involves designing flip-chip-BGA packages for ASICs, collaborating on designs, managing projects, and improving processes.

Design and optimize mechanical aspects of ASIC packages using FEA. Collaborate with teams, conduct validations, and document designs across multiple projects.

Lead ASIC programs from inception to production, manage customer relationships, ensure design quality, and advise on EDA best practices.

The role involves performing full-chip power integrity analysis, solving voltage budget constraints, and developing innovative methodologies for power integrity in advanced VLSI designs.

Responsible for testing PCIe switch solutions. Tasks include creating test scenarios, executing tests, and managing projects while ensuring documentation accuracy.

The System Signal/Power Integrity Engineer supports high data rate applications, collaborating on design and measurement correlations, simulating models, and managing project documentation.

The STA Engineer will perform static timing analysis, develop timing constraints, automate processes, and ensure compliance for complex SoC designs.

The Hardware System Design Engineer will lead PCB system designs, implementing high-speed channels and analog power systems, ensuring integration and performance across cross-functional teams.

Support NPI team in managing engineering sample builds, logistics, and material planning in a cross-functional environment within the semiconductor industry.

Design and develop SDK drivers and embedded software for physical layer on ARM-based microcontrollers, collaborating with teams to ensure integration and resolve issues.

The Staff DFT Engineer will specialize in design for testability, utilizing tools and methodologies for silicon verification, validation, and test. They will work on post-silicon debug, and collaborate cross-functionally while leveraging their automation and scripting expertise.

Lead DFT verification for HBM, DDR, and SERDES designs, collaborating across teams to ensure quality through robust methodologies and analysis.

Design and implement physical layouts for power grids and interconnects, automate processes, and analyze high-speed signal interconnects for advanced IC technologies.

Responsible for developing next generation ASIC products focusing on signal integrity and power integrity in multi-chip modules and advanced interconnect technologies.

The Physical Design Engineer will develop layouts for 2.5D and 3D ICs, conduct electrical analyses, and automate design processes in a collaborative environment.