Jobs at Broadcom

Lead block- and top-level ASIC physical design from floorplanning through GDSII stream-out. Execute placement, clock-tree synthesis, routing, timing and power closure, signal-integrity optimization, and IR-drop/electromigration signoff on advanced 5nm, 3nm, and 2nm nodes. Automate design flows using TCL, Python, and Unix shell scripting while providing technical leadership across complex AI and PCIe switch ASIC projects.

Provides hardware design support, technical guidance, board-level debugging, and laboratory validation for semiconductor solutions. Responsibilities include schematic and PCB layout reviews, component selection, board bring-up, functional testing, troubleshooting with lab equipment, board rework, electrical characterization, and creation of customer-facing technical documentation. The role collaborates with cross-functional engineering teams and supports enterprise, frontier lab, and hyperscaler customers.

Manage 20+ concurrent package and PCB design projects for high-performance ASICs, coordinating scope, schedules, resources, engineering teams, customers, and vendors. Develop signal and power integrity methodologies, support package and PCB technologies, communicate project status and risks, and contribute to SI/PI simulations, automation, lab measurements, and design-flow improvements. The role requires on-site collaboration five days per week.

Develops mechanical solutions for silicon photonic engines and advanced networking switches. Responsibilities include thermal and mechanical simulations using FloTHERM and Ansys, opto-mechanical design, tolerance analysis, product development, vendor and part evaluation, failure analysis, DOE, DFMEA, troubleshooting, lab experimentation, and dimensional metrology. The role collaborates with multidisciplinary engineering teams and requires customer interaction.

Develops and evaluates electrostatic discharge protection solutions for complex electronic systems. Uses Ansys PathFinder, Calibre DRC, and Calibre PERC to automate ESD checks, verify designs, analyze electrical tradeoffs, and improve circuit protection. Collaborates with design and product engineering teams, documents projects, applies ESD standards, and independently delivers solutions against project goals.

Lead chip-level physical verification for advanced-node ASICs, including DRC, LVS, ERC, PERC, DFM, density and fill checks. Set up rule decks and verification flows using ICV, Calibre, and Pegasus; resolve integration, floorplan, I/O, bump, EMIR, and tape-out issues. Develop verification methodologies, optimize runtimes, guide physical design teams, and establish best practices. This is an onsite San Jose role requiring a bachelor’s degree in electrical or electronics engineering and 12+ years of experience.

Designs and implements high-performance digital IC RTL for PCIe switch and enterprise storage products. Responsibilities include architecture analysis, microarchitecture development, Verilog/SystemVerilog coding, timing closure, RTL optimization and debugging, third-party IP integration, and cross-functional support through emulation, validation, and silicon lab testing. The role is fully onsite and supports next-generation AI/ML data center ecosystems.

Designs and implements high-performance digital IC RTL for PCIe switch and enterprise storage products. Responsibilities include architecture analysis, microarchitecture development, Verilog/SystemVerilog implementation, timing closure, RTL debugging, third-party IP integration, and collaboration with verification, software, emulation, and validation teams. Provides lab support during silicon validation. The role is fully on-site.

Designs and implements high-performance digital IC RTL for PCIe switch and enterprise storage products. Responsibilities include architecture analysis, micro-architecture development, Verilog/SystemVerilog implementation, clock-domain crossing, low-power design, timing closure, RTL debugging, cross-functional issue resolution, and silicon validation support. The role requires in-person work and collaboration with verification, software, emulation, and validation teams.

Develops thermal management, ASIC socketing, cooling, and mechanical solutions for semiconductor test and validation hardware. Designs and verifies components in SolidWorks, extracts 3D PCB data, analyzes device warpage, validates simulations with profilometry, troubleshoots lab hardware, manages vendors, and oversees procurement. The role requires expertise in high-power ASIC socketing, thermal analysis, mechanical simulation, prototyping, ATE hardware, and vendor management.

Design and implement high-performance digital IC RTL for PCIe switch and enterprise storage products. Responsibilities include architecture analysis, microarchitecture development, Verilog/SystemVerilog implementation, clock-domain crossing, low-power design, timing closure, RTL debugging, third-party IP integration, cross-functional issue resolution, and silicon validation support. The role is fully on-site.

Develop and maintain ASIC and SoC design verification environments using SystemVerilog and UVM. Create verification components, behavioral models, assertions, coverage, and directed or randomized tests. Analyze simulation failures and coverage results, debug complex design issues, and verify systems at block and system levels. Collaborate with design and verification teams while applying ASIC design verification methodologies and tools.

Design and develop rack- and tray-level mechanical enclosures and chassis for high-performance power electronics. Own products from concept through volume production and sustaining, including component selection, tolerance analysis, DFM, documentation, prototyping, testing, qualification, and troubleshooting. Collaborate with multidisciplinary engineering, manufacturing, compliance, and customer-support teams while addressing thermal, power delivery, regulatory, and production challenges.

Design, develop, and deliver firmware, drivers, microcode, embedded Linux systems, and control software for datacenter-scale platforms. Own projects throughout the product lifecycle, including silicon and system bring-up, debugging, validation, automation, customer trials, field support, and production sustainability. Collaborate with multidisciplinary engineering and business teams in an in-person, fast-paced environment.

Design, develop, and deliver firmware, drivers, microcode, embedded Linux systems, and control software for datacenter-scale platforms. Own projects throughout the product lifecycle, from architecture and system bring-up through validation, customer trials, production, and field support. Develop low-level interfaces, security features, telemetry protocols, and automation while collaborating with interdisciplinary and partner engineering teams. The position is in person and requires close cross-functional collaboration.

Designs, develops, validates, and sustains high-performance electronic products. Owns end-to-end electrical hardware development, including BOM creation, vendor coordination, circuit and board design, validation, customer trials, field issues, and product sustaining. Collaborates with hardware, ASIC, signal, mechanical, thermal, diagnostics, packaging, manufacturing, and partner engineering teams throughout the product lifecycle.

Designs and delivers ultra-high-performance electronic products through complete hardware ownership, including BOM creation, circuit and board design, development, validation, manufacturing support, customer trials, field issue resolution, and product sustaining. Collaborates with hardware, ASIC, signal, mechanical, thermal, diagnostic, packaging, manufacturing, and partner engineering teams. The role focuses on high-powered SoCs, advanced packaging, 1kW+ PCB power and thermal challenges, and 112G+ SerDes signaling.

Design, develop, and deliver firmware, embedded software, device drivers, microcode, and control software for datacenter-scale systems. Own projects throughout the product lifecycle, including bring-up, debugging, validation, automation, customer trials, field support, and production sustainability. Collaborate with multidisciplinary and partner engineering teams while contributing expertise in Linux, firmware, hardware interfaces, management protocols, secure boot, and datacenter networking. The role also involves mentoring and cross-functional collaboration.

Performs full physical IC design from RTL through silicon tape-out, including synthesis, physical verification, timing closure, EM/IR analysis, place and route, clock tree synthesis, floor planning, layout, and methodology development. Collaborates with RTL engineers and develops design flows using TCL and Perl. This is an on-site role in Colorado Springs.

Performs full physical IC design from RTL through silicon tape-out, including synthesis, physical verification, timing closure, EM/IR analysis, place and route, clock tree synthesis, floorplanning, layout, and methodology development. Collaborates with RTL engineers and works onsite in Colorado Springs.