Lead HBM/DRAM procurement and supply planning, develop multi-year supplier roadmaps, negotiate long-term agreements, manage supplier performance and capacity, forecast demand with product and planning teams, mitigate allocation risks, and support cross-functional NPI, finance, legal, and engineering activities.

Lead verification for complex SoCs (touch controllers/wireless charging): architect UVM/HVL block and full-chip environments, develop mixed-signal test plans and coverage, debug RTL/gate simulations, create FPGA/ASIC diagnostics, replicate silicon bugs, convert tests to ATE vectors, and validate low-power designs using UPF flows.

The Physical Design Engineer will focus on design implementation for ASIC/SoC, including place-and-route, timing closure, and physical verification, leveraging tools to optimize performance, power, and area metrics while meeting design methodologies.

As a VMKernel Software Engineer, you will design and develop OS techniques for virtualization, collaborate on projects, and manage kernel infrastructure.

Serve as a bridge between engineering and customers, solving complex issues through innovative solutions, mentoring, and evangelism in the Kubernetes ecosystem.

The Applied AI Engineer will design and implement AI infrastructure solutions, optimize AI workloads, and collaborate with teams to deliver efficient AI solutions for VMware's Cloud Foundation Division.

This role focuses on modeling and simulation of piezoelectric resonators, requiring close collaboration with cross-functional teams to optimize device performance using FEM models in Comsol.

The Senior Reliability Engineer will develop and execute tests for RF devices, focusing on performance stability, reliability, and failure analysis in semiconductor products.

As an R&D Software Engineer, you will develop and maintain core virtualization technology for Broadcom, focusing on CPU and memory virtualization, low-level OS kernel internals, and system software development.

The SOI Switch Design Engineer will design switches, model RF devices, guide layout designs, and work with CAD engineers. A Ph.D. and extensive experience are preferred.

Join Broadcom's Core Switching Group as an Applications Engineer to enhance customer support workflows using AI capabilities and modern programming languages.

The role involves supporting high-speed signal integrity design, simulation, modeling, and measurement analysis for high-speed digital applications.

The Physical Design Engineer will develop layouts for 2.5D and 3D ICs, conduct electrical analyses, and automate design processes in a collaborative environment.

The FBAR Reliability Engineer coordinates with teams to qualify products, handles RF characterization, maintains test systems, and analyzes data.

Develop scalable Kubernetes-based systems, create custom operators, optimize clusters, integrate CI/CD, and troubleshoot Kubernetes applications. Collaborate cross-functionally and contribute to open-source projects.

Responsible for developing next generation ASIC products focusing on signal integrity and power integrity in multi-chip modules and advanced interconnect technologies.

Develop next generation products focusing on parallel interfaces. Responsibilities include timing signoff, modeling, PCB analysis, and automating sign-off processes.

Responsible for micro-architecture, design, RTL coding, debugging, and synthesis of functional blocks in network switch products. Collaborate with Physical Design team and execute post-silicon debugging.

Lead DFT verification for HBM, DDR, and SERDES designs, collaborating across teams to ensure quality through robust methodologies and analysis.

Join Broadcom's Design Implementation team to work on CMOS ASICs for AI/ML, focusing on physical design tasks, customer communication, and addressing design challenges.