The HRIS Principal Architect is responsible for designing and optimizing Workday HCM solutions, ensuring user-centric compliance, and leading HRIS projects with a focus on AI integration.

The role involves providing technical support for Cadence Quantus and Voltus-Fi products, performing benchmarks, and delivering demonstrations while collaborating with sales management and customers.

Cadence is offering a 16-week paid returnship for Physical Design Application Engineers to update skills and re-enter the workforce after caregiving. Candidates will work with EDA tools on Digital Synthesis, Place and Route, and Signoff Analysis.

The candidate will work on the R&D team for the Virtuoso Platform, developing and maintaining infrastructure components, user interface, and programming functionalities while ensuring high-quality standards.

The Software Engineer will develop circuit simulation algorithms, validate software on Unix/Linux, and optimize performance in electrical circuit simulation.

Work on the Virtuoso Platform's development and maintenance, focusing on OpenAccess and core Infrastructure components with a collaborative team.

Provide comprehensive administrative and operational support to senior leadership, including calendar management, travel coordination, and meeting facilitation. Anticipate needs and ensure smooth daily operations while collaborating cross-functionally and handling sensitive information.

The Lead Application Engineer will solve customer IC design challenges, support technical evaluations, conduct presentations, and improve customer adoption of Cadence solutions, collaborating with various teams to ensure customer success.

The role involves leading the Field Applications Engineering Team, providing technical support, and developing innovative solutions for customer verification needs in the semiconductor industry.

The AE Director will lead a team in deploying Cadence's emulation and FPGA prototyping platforms while providing technical support to customers. This role involves driving customer success and collaborating with R&D to solve verification challenges.

This role involves designing, developing, and maintaining PCIe/CXL AVIP/VB components, focusing on protocol functionality and performance, while collaborating with teams and supporting customers.

The IT Site Support Engineer provides hands-on technical support for end-user computing, including troubleshooting hardware and software issues, managing user accounts, and collaborating with IT teams.

The PLM Configuration Analyst manages product structures, BOMs, and documentation. Responsibilities include handling ECRs and ECOs, ensuring compliance, and providing guidance on PLM best practices.

Join the Cadence Protium team to optimize compiler TDM route development, focusing on compile time, performance, and memory efficiency.

Responsible for managing Meta accounts, driving revenue growth, maintaining relationships, and ensuring successful execution of contracts and projects.

Lead technical campaigns and support sales by delivering workshops and training, utilizing expert knowledge in signal and power integrity for IC and PCB designs. Collaborate with R&D and ensure customer success through effective communication and problem-solving.

Join Cadence's application engineering team as a Lead Application Engineer, providing technical support for verification and emulation products, developing requirements, and conducting customer presentations.

Lead budgeting and forecasting, support financial close processes, analyze financial data, and provide insights for management decisions.

Entry-level position in a cohort-based program with two rotations focusing on digital design, verification, and embedded software development. Includes hands-on training and networking opportunities.

The Principal Design Engineer will lead and contribute to digital IC development projects, requiring proficiency in logic design, micro-architecture, and Verilog/SystemVerilog.