Teams at Cerebras Systems

Design and develop microarchitecture and RTL for wafer-scale AI chips. Lead functional specification, RTL development, synthesis and front-end integration. Collaborate with physical design, verification, DFT, software and systems teams to meet PPA goals. Debug silicon-level functional, timing, and power issues and manage third-party IP and vendor interactions to deliver production silicon.

Lead PCB design from specification through implementation, bring-up, qualification, and production. Own schematics, component selection, and layout. Perform lab bring-up, debugging, and automated benchtop test development. Collaborate with manufacturing, test, supply chain, ASIC, mechanical, signal integrity, power delivery, layout, embedded, and diagnostics teams.

The Deployment Engineer will manage AI inference clusters, optimizing deployment, capacity allocation, and ensuring reliability of pipeline operations across datacenters.