Jobs at Lattice Semiconductor

Leads enterprise learning and leadership development strategy, including multi-level leadership programs, manager effectiveness, executive development, career pathing, mentoring, succession planning, and learning technology. Builds and manages a high-performing team, external vendor network, budgets, and evaluation frameworks. Partners with executives and HR leaders to align capability-building investments with business priorities and reports outcomes such as participation, internal mobility, retention, and leadership bench strength.

Leads Lattice’s global Applications Engineering, Verification, Foundation IP, Customer Enablement, and Customer Support organizations. Owns reusable IP, reference designs, customer enablement, technical support, customer engagement, and qualification methodologies across FPGA product families. Partners with R&D, product, firmware, business unit, and corporate leaders to deliver scalable programmable platforms. Manages global technical leadership, operating budgets, headcount planning, and executive-level representation across multiple international sites.

Develop, fine-tune, evaluate, optimize, and deploy large language and multimodal models in local, on-premises, edge, and restricted environments. Build scalable training and inference pipelines, integrate models into production APIs, monitor performance and resource usage, and ensure security and compliance. Collaborate with engineering and business teams, define KPIs, document workflows, evaluate emerging AI techniques, and mentor other engineers.

Lead EDA methodology and infrastructure for RTL-to-GDSII flows, tool deployment, compute and cloud integration, and GenAI-driven automation. Build and mentor CAD/EDA teams, standardize processes, evaluate vendors, and mitigate risks to accelerate semiconductor design and time-to-market.

Leads SoC and chiplet-based MCM development from architecture through tapeout and production. Owns chip signoff, system-level modeling, performance tradeoffs, debug, DFx methodology, and hardware design decisions across processor, memory, interconnect, security, configuration, and high-speed interface subsystems. Provides technical leadership across distributed engineering teams, manages IP vendor roadmaps, supports emulation and validation, presents technology strategies to executives, and applies agentic AI to accelerate design execution.

Lead and support SEC financial reporting, US GAAP technical accounting, monthly/quarterly/annual close, SOX compliance, and operational accounting. Manage audits, mentor accounting staff, drive process and ERP improvements, and partner cross-functionally on acquisitions, stock-based compensation, and other complex transactions for a Nasdaq-listed semiconductor company.

Lead foundry-facing technical activities to enable process adoption and on-time tape-out. Manage PDK readiness, align design/signoff flows with foundry requirements, define device test structures, support silicon characterization, and scale technology collateral and methodology across teams.

Lead go-to-market strategy for humanoid robots, cobots, and adjacent AMRs. Define segment strategy, solution narratives, MRDs, and differentiations around low-power programmable logic and Tiny AI. Drive design-win engagement with top platform architects, build targeted ecosystem partnerships, coordinate with sales and engineering, and represent the company at industry forums to accelerate adoption of Physical AI at the edge.

Manage assigned accounts and territories to drive revenue and design wins. Build account plans, maintain CRM pipeline, forecast sales, influence stakeholders, coordinate cross-functional teams, and present technical value propositions. Advocate customer needs to product teams and negotiate contracts to achieve measurable customer satisfaction and business goals.

Own and grow relationships with hyperscale accounts globally, drive sales opportunities and forecasts, coordinate cross-functional teams, deliver presentations, manage partners/programs, and meet revenue goals.

Lead R&D FP&A partnering with engineering and product leaders to evaluate ROI, build financial models, manage multi-year budgets and forecasts, optimize resource allocation, identify cost efficiencies, mentor FP&A analysts, and deliver executive-level reporting and dashboards to inform strategic R&D investment decisions.

Lead product marketing strategy and go-to-market for a strategic semiconductor product line. Define positioning, pricing, requirements, and success metrics; align engineering, sales, and executives; champion customer voice; represent externally; and mentor the extended product marketing team to drive competitive, profitable growth.

Lead design and development of industrial automation architectures integrating PLCs, robotics, vision, sensors, motion control, and cloud/edge IIoT. Drive discovery, solution design, proofs-of-concept, partner collaboration, technical marketing narratives, and industry standards engagement to support business development and ecosystem adoption.