Jobs at Samsung Semiconductor, Inc.

Design low-power RF and Analog circuits, lead design verification, collaborate with digital teams, and conduct research on advanced wireless techniques.

Lead software-hardware co-design to optimize LLM and agentic AI inference. Profile and optimize model execution for memory bottlenecks, influence memory and accelerator architecture, and develop/benchmark inference and serving solutions using PyTorch and vLLM while mentoring teams on best practices.

The Director of Design Verification will oversee SoC verification processes, manage engineering teams, and collaborate across departments to enhance memory and storage capabilities, ensuring first-pass silicon success.

Develop verification infrastructure for AI accelerator IP blocks, create testbenches, mentor junior engineers, and debug across teams.

The role involves developing advanced location technologies, optimizing receiver models, designing algorithms for GNSS systems, and collaborating with various engineering teams. Responsibilities include simulation, testing, and performance analysis of location IP products.

The Staff Engineer, FPGA will design and optimize RTL for FPGAs, manage command queues, ensure cache coherency, and collaborate on system integration and debugging efforts.

Design and simulate high-speed I/O analog-mixed circuits, guide layout optimization, and ensure specifications for performance and functionality.

Develop and optimize memory centric computing systems; troubleshoot hardware issues, collaborate with engineers, and stay updated on AI/ML advancements.

Manage customer selection of DRAM-based memory solutions, ensuring technical program management, customer relationships, and engineering support while working with internal and external stakeholders.

The Senior Manager, Technical Marketing focuses on custom SoC business development, technical requirements review, customer engagement, and cross-functional collaboration with internal teams for strategic solutions. They build customer relationships and manage account activities, requiring a blend of technical expertise and business acumen.

The Senior Account Memory Sales Manager will lead key AI infrastructure accounts, focusing on High Bandwidth Memory solutions, manage executive relationships, and drive commercial activities.

Lead SoC-level microarchitecture, top integration, logic design and RTL implementation for memory/storage controllers. Integrate and review 3rd-party IPs (UCIe, DDR, CPU, Ethernet), collaborate with verification and physical design teams on synthesis, timing, DFT, CDC, lint, and silicon bring-up to deliver production-ready silicon.

Lead U.S. accounting for semiconductor sales and R&D, overseeing financial reporting (IFRS/US GAAP), month/quarter/year close, audits, ICFR, fixed assets/AUC, treasury, AP/P2P, ERP optimization, HQ liaison, and team development to support strategic decisions and compliance.

The role involves managing sales strategies, analyzing market data, improving customer relations, and executing revenue maximization plans.

The role involves adapting PyTorch for specific hardware, building kernel DSLs, designing scheduling passes, and contributing to open-source projects related to AI/ML workloads.

Build and operate representative LLM and distributed AI environments, collect traces and telemetry, develop benchmarks, and identify performance bottlenecks across compute, memory, interconnect, and scheduling. Profile and optimize workloads on NVIDIA GPU platforms, analyze large-scale distributed AI performance, and collaborate with hardware and software teams to guide hardware-software co-design for next-generation AI platforms.

Research and develop next-generation embedded memory firmware and architectures. Design, code, validate, and fine-tune firmware; perform lab bring-up and server integration; validate hardware IPs in virtual environments; develop HAL APIs and RTOS-based embedded memory software. Collaborate with cross-functional teams, customers, and partners throughout development and integration.

Develop high-fidelity RTL/SystemC/C-based power macromodels for AI memory IPs by extracting activity and state-dependent power features, creating analytical/LUT/FSM/ML models, performing synthesis-assisted calibration, validating against RTL/gate-level and silicon data, and collaborating on model interfaces and system-level composition for full-system power simulation.

The SoC Architect leads the design of SoC architectures to meet PPA targets, collaborates across teams, and resolves technical risks.

Lead Samsung foundry customer programs across process technologies, serving as primary technical account interface. Drive business growth, coordinate NPI to production with internal teams, ensure customer satisfaction, and achieve manufacturing milestones.