Samsung Semiconductor, Inc. Logo

Samsung Semiconductor, Inc.

Staff Analog/Mixed Signal Engineer

Posted 21 Days Ago
Be an Early Applicant
In-Office
San Jose, CA, USA
163K-253K Annually
Expert/Leader
In-Office
San Jose, CA, USA
163K-253K Annually
Expert/Leader
Designs RF/analog PLLs, clock-generation circuits, and SerDes analog PHYs in advanced CMOS technologies. Responsibilities include mixed-signal system modeling, circuit-level verification, production support, collaboration with digital and software teams, critical layout, and prototype lab testing. The role requires extensive experience with frequency synthesizers, PLL subsystems, IC design tools, hardware description languages, physical layout, and laboratory evaluation.
The summary above was generated by AI

Please Note:

To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. 

Advancing the World’s Technology Together

Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future. 

We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.

Please Note:

To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. 

Advancing the World’s Technology Together

Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future. 

We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.


Please Note:

To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. 

Advancing the World’s Technology Together

Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future. 

We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.

Samsung Semiconductor Inc. (SSI) is advancing the world’s technology. As a leader in Memory, System, LSI and LCD technologies, our US teams contribute to breakthroughs in 5G, SOC, memory and display. With our global perspective and diversity of thought, we proudly serve our customers around the world. We are looking for team members who share our commitment to learning and growth and excel when collaborating within and across teams.

Samsung Semiconductor Inc is looking for a talented Senior/Staff PLL Designer with strong background and hands-on experience in PLL and clock generation circuit design. The candidate will work on the design and development of high-performance PLL and clocking subsystems for RF transceivers, SerDes, and high-speed I/O applications in advanced deep-submicron CMOS technologies.

What You’ll Do

•    Design RF/Analog PLL and clocking circuits using advanced deep-submicron CMOS technologies.
•    Design Serdes analog PHY circuits using advanced deep-submicron CMOS technologies.
•    Perform system modeling and analysis for mixed signal system.
•    Perform design verification and production support tasks.
•    Work closely with digital and software developers to develop an implementation that meets system requirements.

What You Bring

  • Bachelor’s with 10+ years of experience or Master's with 8+ years of experiences or PhD with 5 years of experience in a related field.
  • Hands-on experience in designing various frequency synthesizer and clock generation circuits, such as VCO, DCO, charge-pump, analog or digital phase detector, regulators, bandgrap reference, reference clock oscillator and buffer, DLL, phase interpolator, etc. in deep sub-micron CMOS technologies.
  • Ability to comprehend PLL loop system knowledge to circuit level specifications. Excellent problem solving and analytical skills are essential.
  • Strong knowledge on IC design CAD tools such as Spectre, SpectreRF, AMS simulator, Matlab.
  • Familiar Verilog, SystemVerilog programming.
  • A thorough understanding of the physical layout requirement and ability to perform the critical layouts.
  • Lab testing skills to evaluate the prototype unit to the design specification.
  • Motivated to carry out a wide variety of tasks with clear communication and presentation skills in a dynamic team environment.  

#LI-VL1


What We Offer
The pay range below is for all roles at this level across all US locations and functions. Pay within this range varies by work location and may also depend on job-related knowledge, skills, and experience. We also offer incentive opportunities that reward employees based on individual and company performance. 

This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours.

Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.
Enjoy Time Away You’ll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.
Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, caregiver support, and medical travel support.
Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you’ll have support no matter where you are.
Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.
Embrace Flexibility Benefits are best when you have the space to use them. That’s why we facilitate a flexible environment so you can find the right balance for you.

Base Pay Range
$163,000—$253,000 USD

Equal Opportunity Employment Policy 

Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status.

When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations.

Our Commitment to Innovation and Fairness

At Samsung Semiconductor, we use Artificial Intelligence (AI) tools in the recruitment process to enhance efficiency. However, AI is used as a support tool, not a final decision-maker. All hiring decisions are made by our human recruiting team and hiring managers to ensure every candidate is evaluated fairly and holistically.

Recruiting Agency Policy

We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings.

Applicant AI Use Policy 

At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we ask that candidates rely on their own knowledge and skills throughout the process. AI tools may be used for basic preparation, grammar, and research, but should not be used to generate or assist with submitted content or live interview responses. If we determine that AI is being used outside these guidelines, we reserve the right to pause or end the interview, and your candidacy may be disqualified.

Trade Secret Notice

By submitting an application, you agree not to disclose to Samsung—or encourage Samsung to use—any confidential or proprietary information (including trade secrets) belonging to a current or former employer or other entity.


Applicant Privacy Policy
https://semiconductor.samsung.com/about-us/careers/us/privacy/

HQ

Samsung Semiconductor, Inc. San Jose, California, USA Office

San Jose, CA, United States

Samsung Semiconductor, Inc. Milpitas, California, USA Office

Milpitas, United States

Samsung Semiconductor, Inc. Santa Clara, California, USA Office

Santa Clara, United States

Similar Jobs

29 Days Ago
In-Office
150K-221K Annually
Senior level
150K-221K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
Design and validate high-performance broadband analog and mixed-signal circuits for optical and electrical receiver and transmitter chips. Responsibilities include developing CMOS and BiCMOS circuits, analog front ends, TIAs, drivers, regulators, sensors, and related circuitry; supporting tapeout, laboratory evaluation, post-silicon validation, qualification, production transition, and customer support.
Top Skills: AdsAnalog EqualizersBicmosBroadband Analog CircuitsFinfet CmosMatlabMixed-Signal CircuitsSilicon PhotonicsSpectreTransimpedance Amplifiers
One Month Ago
In-Office
Santa Clara, CA, USA
150K-250K Annually
Senior level
150K-250K Annually
Senior level
Semiconductor • Manufacturing
Designs, simulates, verifies, and refines multi-gigabit PAM4 SerDes IP and analog/mixed-signal receiver blocks, including TI-SAR ADCs, CTLE, DFE, and AFE components. Responsibilities include CDR development, high-speed testing with oscilloscopes and BERT, analog-digital interface verification, layout optimization, clock and synchronization design, and IP documentation. The engineer collaborates with system and test teams on high-speed interfaces, packages, boards, and system clocks for image sensor and bridge chip products.
Top Skills: AfeBertCadenceCdrClock TreesClock-Domain CrossingCtleDfeOscilloscopesPam4RtlSerdesSpectremdlSpiceTi-Sar Adc
4 Minutes Ago
Hybrid
23-31 Hourly
Entry level
23-31 Hourly
Entry level
Fintech • Financial Services
Build customer relationships and support everyday banking needs through account openings, service requests, credit applications, cash handling, and proactive outreach. Identify customer needs, recommend appropriate banking products and digital tools, make referrals, and support branch growth. Ensure accurate, compliant service while following risk controls, collaborating with branch teammates, and adapting between teller and customer-banking activities, including Saturday scheduling.

What you need to know about the San Francisco Tech Scene

San Francisco and the surrounding Bay Area attracts more startup funding than any other region in the world. Home to Stanford University and UC Berkeley, leading VC firms and several of the world’s most valuable companies, the Bay Area is the place to go for anyone looking to make it big in the tech industry. That said, San Francisco has a lot to offer beyond technology thanks to a thriving art and music scene, excellent food and a short drive to several of the country’s most beautiful recreational areas.

Key Facts About San Francisco Tech

  • Number of Tech Workers: 365,500; 13.9% of overall workforce (2024 CompTIA survey)
  • Major Tech Employers: Google, Apple, Salesforce, Meta
  • Key Industries: Artificial intelligence, cloud computing, fintech, consumer technology, software
  • Funding Landscape: $50.5 billion in venture capital funding in 2024 (Pitchbook)
  • Notable Investors: Sequoia Capital, Andreessen Horowitz, Bessemer Venture Partners, Greylock Partners, Khosla Ventures, Kleiner Perkins
  • Research Centers and Universities: Stanford University; University of California, Berkeley; University of San Francisco; Santa Clara University; Ames Research Center; Center for AI Safety; California Institute for Regenerative Medicine

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account