Jobs at Tenstorrent Inc.

Physical Design Engineers at Tenstorrent are responsible for implementing high-performance AI SoC designs, overseeing the complete implementation flow from synthesis to tapeout and collaborating with cross-functional teams to ensure all design aspects are met.

Responsible for physical design of high-performance CPUs and AI/ML architectures, including implementation from synthesis to tapeout, and collaborating with front-end teams.

The AI Subsystems Physical Design Lead is responsible for timing for subsystems in an AI chip, collaborating with RTL designers, and involved in synthesis, place and route, timing analysis, and power optimization.

As a Full-Chip Physical Design Verification Engineer, you will ensure manufacturable silicon by driving full-chip signoff, leading physical verification closure, and collaborating with various teams to achieve successful tapeouts.

The Physical Design Engineer will implement high-performance blocks for CPUs and AI/ML architectures, overseeing the entire flow from synthesis to tapeout and collaborating closely with teams to optimize performance, power, and area.

Develop, optimize, and debug production ATE test programs and SSN-based scan content for high-performance AI/ML silicon. Translate ATPG patterns into production-ready tests, support silicon bring-up and manufacturing debug, collaborate with DFT/design teams, and build automation and documentation to scale test methodologies and improve yield.

Develop and optimize software for IP customers, including firmware, drivers, and APIs. Collaborate with cross-functional teams for software integration and troubleshooting.

Lead post-silicon power characterization and correlation for semiconductor products, develop measurement strategies, and improve power architectures to meet specifications.

The Physical Design Engineer will lead efforts in solving physical design challenges, improve RTL-to-GDS methodologies, and integrate AI/ML solutions into CAD flows, focusing on performance and runtime improvements.

As a SOC Emulation Engineer, you'll support hardware emulation infrastructure, integrating hardware transactors and developing Python-based test frameworks while providing technical support across chip projects.

As a Senior Software Engineer at Tenstorrent, you will develop AI compiler technologies, optimize computational graphs, and enhance MLIR frameworks to connect AI models with hardware.

The SoC Physical Design Verification Engineer leads full-chip signoff, ensuring high-quality silicon through physical verification and debugging across teams for successful tapeouts.

The Sr. Staff HR Business Partner will guide senior leaders in aligning talent strategies, drive complex people projects, and enhance organizational health.

Design and validate high-speed interconnects for AI systems, defining requirements and performing reliability testing for copper and optical technologies.

The STA Methodology Engineer will lead the optimization of timing methodologies and automation, collaborating across teams to address advanced-node design challenges.

As a C++ Machine Learning Engineer, you will optimize ML training frameworks, debug model performance, and collaborate with various teams to enhance model implementation.

Design, develop, and optimize GCC and LLVM compilers for RISC-V and AI architectures, collaborating across hardware and software teams to enhance performance.

Design and simulate high-speed interconnects, collaborate with teams on specifications, troubleshoot issues, and support post-silicon bring-up and validation.

The PCB Layout Engineer will design multi-layer PCB layouts for high-performance computing and AI hardware, ensuring specifications for mass production. Responsibilities include routing high-speed interfaces and collaborating with cross-functional teams to meet design requirements.

Drive top-level implementation of complex AI and CPU SoC designs, ensuring design closure and optimizing chip-level implementations for power, performance, and area.