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Vinci4D.ai

Computational Electromagnetics Engineer – Signal Integrity

Posted 7 Days Ago
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Hybrid
Palo Alto, CA, USA
180K-210K Annually
Senior level
Hybrid
Palo Alto, CA, USA
180K-210K Annually
Senior level
Design and implement frequency- and time-domain EM solvers and quasi-static extraction for IC package, PCB, via and connector interconnects. Build S-parameter workflows, SI analysis (impedance, crosstalk, eye diagrams), EM-to-thermal coupling, validation against commercial tools, and integrate outputs into the Vinci4D platform.
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About Us

At Vinci4D, we are building the next generation of multi-physics simulation software for semiconductor and electronics applications — tools that let engineers model thermal, fluid, electromagnetic, and structural phenomena in the same framework, from first principles to final answer. We are a small, technically deep team that moves fast, ships real software, and takes on problems that the established players have not solved well. If you want your work to be foundational to a platform that changes how the electronics industry designs its most demanding products, this is the place.

The Role

We are looking for a computational electromagnetics engineer with deep expertise in signal integrity simulation for the semiconductor and electronics industry. You understand Maxwell's equations well enough to derive discretisations from scratch, and you have shipped production EM solvers or SI analysis tools that real engineers have relied on to qualify packages, characterise high-speed channels, or sign off interfaces at multi-gigabit data rates.

You will design and implement EM solver capabilities within Vinci4D's multi-physics platform — spanning signal integrity analysis, frequency-domain and time-domain full-wave methods, and quasi-static extraction. You will bring the domain depth needed to make those tools genuinely useful for signal integrity, power integrity, and EM-thermal coupling workflows in semiconductor packaging and PCB design.

This is not a "run simulations for customers" role. You will be building the solvers themselves: formulating the problems mathematically, implementing the discretisations, validating against reference solutions, and integrating the results into a coupled multi-physics framework.

What You Will Work On

  • Design and implement frequency-domain and time-domain full-wave EM solvers targeting IC package, via, connector, and PCB interconnect structures at GHz frequencies

  • Develop S-parameter port extraction workflows — implementing waveport and lumped port excitations, Fourier-transforming time-domain responses, and producing touchstone-format output compatible with industry channel simulators

  • Build signal integrity analysis capabilities: transmission line characterisation, via resonance prediction, crosstalk analysis, and eye diagram generation from simulated channel responses

  • Implement time-domain methods (FDTD) with PML absorbing boundary conditions for broadband signal integrity and EMI analysis, including Gaussian pulse excitation and wideband S-parameter extraction in a single simulation run

  • Develop quasi-static field solvers for parasitic extraction — resistive, capacitive, and inductive — with frequency-dependent skin-effect corrections, producing RLGC outputs for SPICE and channel simulation workflows

  • Build the EM-to-thermal coupling layer: computing volumetric Ohmic dissipation from EM field solutions and passing it as a source term to Vinci4D's thermal solver, with support for iterative coupling under temperature-dependent material properties

  • Develop and maintain validation infrastructure: convergence tests, golden-output comparisons against commercial reference tools (HFSS, CST, SIwave), and SI-specific benchmarks covering via S-parameters, transmission line impedance, and crosstalk

  • Collaborate with the team to integrate EM capabilities into the Vinci app, delivering outputs in formats familiar to SI engineers: S-parameters, eye diagrams, impedance profiles, and RLGC matrices

What We Are Looking For

Technical Skills — Must Have
  • Deep working knowledge of computational electromagnetics: FDTD, FDFD, and quasi-static methods, with a clear understanding of when each is appropriate and what their failure modes are

  • Hands-on experience with signal integrity simulation for the semiconductor industry — high-speed channel analysis, package and via characterisation, transmission line extraction, crosstalk, or PDN impedance — with an understanding of the numerics behind the tools, not just their outputs

  • Solid understanding of the full SI simulation workflow: from 3D EM field solutions through S-parameter extraction, through channel simulation, to eye diagram and margin analysis

  • Experience implementing FDTD solvers including the Yee cell staggered update, CFL stability, PML or absorbing boundary conditions, and port-based S-parameter extraction via Fourier analysis of time-domain responses

  • Experience with frequency-domain EM (FDFD or equivalent) including complex material properties, frequency sweeps, and direct or iterative solution of the resulting sparse complex linear systems

  • Experience with quasi-static field solvers for resistive, capacitive, and inductive parasitic extraction, including frequency-dependent skin-effect modelling

  • Proficiency in C++ and/or Python in a performance-critical scientific computing context

  • Strong software engineering practices: Git, code review, automated testing, CI/CD pipelines, and regression testing against reference solutions

Technical Skills — Desired
  • Working knowledge of high-speed interface standards relevant to semiconductor packaging: PCIe, DDR5/6, HBM, LPDDR, or equivalent SerDes interfaces at data rates above 10 Gbps

  • Experience with S-parameter characterisation and touchstone file workflows — generating, validating, and consuming multi-port S-parameter models in a production SI context

  • Solid understanding of the scale hierarchy in SI simulation: what quasi-static extraction covers, where full-wave treatment is required, and how the two are combined in a complete channel model

  • Familiarity with the EM-thermal coupling path in high-speed packaging or power electronics: deriving Ohmic heating from EM field solutions and using it as a thermal source term

Experience
  • 4–8 years of industry or research experience in computational electromagnetics applied to semiconductor packaging, PCB design, or high-speed electronics

  • Experience working within or closely alongside EDA-adjacent workflows — understanding how EM simulation outputs connect to circuit simulators, layout tools, and SI sign-off flows

  • A track record of delivering validated, production-quality solver code or extraction tools — not just academic prototypes

Soft Skills
  • Able to communicate EM concepts clearly to a multi-disciplinary team that includes thermal engineers, CFD specialists, and software engineers without a CEM background

  • Collaborative and generous with knowledge: you document your formulations, write readable code, and help teammates understand the physics

  • Comfortable with ambiguity: requirements evolve, benchmarks are sometimes wrong, and the right numerical formulation is not always obvious upfront

  • Self-directed and ownership-oriented: you drive your work from mathematical formulation through implementation through validation to integration

Nice to Have

  • Experience with GPU acceleration of EM solvers — FDTD on CUDA, batched sparse solvers for frequency-domain systems, or matrix-free Krylov methods

  • Familiarity with domain decomposition methods for EM problems — Schwarz iterations, Robin transmission conditions, or Schur complement approaches applied to quasi-static or full-wave solvers

  • Background in Method of Moments (MoM) or boundary integral formulations, particularly for PCB power plane or EMC applications

  • Experience with model order reduction for EM: rational fitting (vector fitting), passivity enforcement, or PRIMA-type approaches for compact S-parameter models

  • Familiarity with power integrity — PDN impedance, simultaneous switching noise, decoupling capacitor placement — as a complement to signal integrity work

  • Experience with co-packaged optics or photonic integration and the associated RF-photonic SI challenges at the package level

  • Graduate degree (M.S. or Ph.D.) in electrical engineering, applied mathematics, computational physics, or a related field with a CEM or SI focus

Why Vinci4D

  • Work on genuinely hard technical problems at the intersection of EM, thermal, and multi-physics simulation — problems the established EDA vendors have not fully solved

  • Join a small team where your contributions are visible, your formulations end up in the product, and your technical judgment shapes the architecture

  • Competitive compensation with equity participation

  • Flexible work environment

  • The satisfaction of building something from scratch — and the opportunity to define what the next generation of electronics simulation looks like

Vinci4D is an equal opportunity employer. We believe diverse teams build better software and welcome applicants from all backgrounds.

HQ

Vinci4D.ai Palo Alto, California, USA Office

316 High St, Palo Alto, CA , United States, 94301

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