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Eridu AI

DFT Lead

Posted 8 Days Ago
Be an Early Applicant
In-Office
Saratoga, CA
Expert/Leader
In-Office
Saratoga, CA
Expert/Leader
Lead the DFT architecture of multi-chip systems SOC, oversee test design functions, and ensure high coverage goals for scan tests with significant experience in deep sub-micron technologies.
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About Eridu AI 

Eridu AI is a Silicon Valley-based hardware startup pioneering infrastructure solutions that accelerate training and inference for large-scale AI models. Today’s AI performance is frequently limited by system-level bottlenecks. Eridu AI delivers multiple industry-first innovations across semiconductors, software, and systems to unlock greater GPU utilization, reduce capital and power costs, and maximize data center efficiency. The company’s solutions and value proposition have been validated by several leading hyperscalers.

 

The company is led by a veteran team of Silicon Valley executives and engineers with decades of experience in state-of-the-art semiconductors, optics, software, and systems, including serial entrepreneur Drew Perkins, co-founder of Infinera (NASDAQ: INFN), Lightera (acq. by Ciena), Gainspeed (acq. by Nokia) and Mojo Vision (World’s leading micro-LED company and developer of the first augmented reality contact lens).


Responsibilities 

  • Define the DFT architecture of a multi-chip system SOC. involving all aspects of test design functions such as Scan, BIST, Memory Repair, BSD ( ACJTAG/DCJTAG).
  • Proficiency in Synthesis design constraints. ( Ie SDC)
  • Prior experience with Serializers/Deserilizers.
  • Sound Proficiency in either Mentor /Synopsys Test Tools required. Proficiency is synthesis,
  • Define and implement OCC. Exposure to advanced DFT techniques like LBIST and streaming preferred.
  • Fluent in RTL level and Gate level simulation.
  • Supervise ATPG generation and achieve high coverage goals for scan and @speed scan.

Qualifications

  • Knowledge using synthesis, DFT & Simulation CAD tools
  • Familiarity with logic & physical design principles to drive low-power & higher-performance designs
  • Fluency in scripting in some of these languages: Unix, Perl, Python, and TCL
  • Good understanding of device physics and experience in deep sub-micron technologies 7nm or below.
  • Prior Exposure to EMIB architectures and bridge is a plus.
  • Knowledge of Verilog and System Verilog
  • Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated
  • Ability to work well in a team and be productive under aggressive schedules
  • Prior experience of multiple tape out in deep submicron 7nm or below is required.
  • Master’s Degree or bachelor’s degree in EE with a minimum of 15+ years of experience.

Why Join Us?

At Eridu AI, you’ll have the opportunity to shape the future of AI infrastructure, working with a world-class team on groundbreaking technology that pushes the boundaries of AI performance. Your contributions will directly impact the next generation of AI networking solutions, transforming data center capabilities.  

   

The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles.

Top Skills

Dft Architecture
Gate Level Simulations
Mentor/Synopsys Test Tools
Perl
Python
Rtl
Soc
Synthesis Design Constraints
System Verilog
Tcl
Test Design Tools
Unix
Verilog
HQ

Eridu AI Saratoga, California, USA Office

12980 Saratoga Ave, Saratoga, California, United States, 95070

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