Flux Computing Logo

Flux Computing

Digital Design Verification Engineer

Posted Yesterday
Be an Early Applicant
In-Office
San Francisco, CA
170K-285K Annually
Senior level
In-Office
San Francisco, CA
170K-285K Annually
Senior level
The role involves verifying high-speed digital pipelines, developing verification environments, applying formal verification techniques, and collaborating with cross-functional teams.
The summary above was generated by AI

The Role

We are seeking highly skilled and motivated Senior / Staff Digital Verification Engineers with a strong background in CMOS digital design and verification to take ownership of the functional correctness of high-speed, real-time data-processing silicon—from early algorithm modelling through verified RTL, sign-off, and silicon bring-up.

You will join a multidisciplinary group creating groundbreaking OTPUs where digital, optical, and mixed-signal domains intersect.

The ideal candidate brings deep expertise in digital verification methodologies, a solid understanding of hardware architecture, and a passion for building provably correct, high-performance systems that underpin breakthrough AI hardware.

Responsibilities

  • Own end-to-end verification of high-throughput digital pipelines supporting multi-GSPS input rates, continuous streaming data paths, deep pipelining, and robust hand-shaking in advanced CMOS nodes

  • Develop and maintain comprehensive verification environments using SystemVerilog/UVM, including constrained-random testing, coverage closure, and regression automation

  • Define and implement assertion-based verification strategies for control logic, data-path correctness, CDC/RDC, and protocol compliance

  • Apply formal verification techniques (property checking, assertions, equivalence checking) to complement simulation-based verification and accelerate bug discovery

  • Model and validate algorithms using MATLAB/Simulink or Python, ensuring functional equivalence from algorithmic models through RTL and gate-level sign-off

  • Support FPGA prototyping and silicon bring-up by developing targeted testcases, debug strategies, and post-silicon validation plans

  • Collaborate closely with digital design, optical-hardware, mixed-signal, and software teams to ensure correct integration across clock domains, interfaces, and firmware abstractions

  • Analyse verification results to identify root causes, drive design fixes, and improve verification efficiency and reuse

  • Contribute to verification methodology development, documentation, and design/verification reviews; mentor junior engineers where appropriate

Skills & Experience

  • 5+ years of hands-on experience in digital verification for high-performance ASICs or SoCs

  • Ownership of verification for at least one complex block or subsystem processing continuous real-time data streams

  • Strong proficiency in SystemVerilog, assertions (SVA), and modern verification methodologies (e.g. UVM. CocoTB)

  • Proven experience verifying designs operating in GHz-class clock domains, including CDC/RDC analysis

  • Familiarity with industry-standard EDA flows: RTL simulation, formal verification, linting, CDC/RDC, STA, power-intent (UPF/CPF), and gate-level simulation

  • Experience verifying high-speed IP such as SerDes, DDR/HBM, PCIe, Ethernet, or similar interfaces

  • Proficiency with MATLAB/Simulink or Python/NumPy for algorithm modelling, fixed-point analysis, and test-vector generation

  • Solid grounding in digital design principles, computer architecture, DSP fundamentals, and semiconductor basics

  • Clear communicator who collaborates effectively across disciplines and is comfortable operating in a fast-moving, evolving environment

Nice to have

  • Tape-out experience at 22 nm or below

  • Deep hands-on experience with formal verification methodologies, including property decomposition, and coverage-driven formal on tools such as Jasper

  • Exposure to coherent optical links or photonic-electronic co-design

  • Familiarity with AI/ML workloads, systolic arrays, or tensor-processing architectures

  • Expertise in arithmetic pipeline verification

  • Expertise in processor and ISA verification

  • Contributions to open-source RTL, verification frameworks, or FPGA platforms

Compensation & Benefits

  • $170,000 – $285,000 annual salary, depending on experience, skills, and location.

  • Competitive salary and stock options, you’re not just part of the journey, you will own a piece of it.

  • Live within 45 minutes of the office? Perfect. Live within 20 minutes? We’ll add an extra location bonus ($36K) to your salary.

  • We offer financial and operational relocation support (US and abroad), through a dedicated third-party provider who is on hand to make your move as seamless as possible.

  • We offer US employees access to a 401(k) retirement savings plan and we plan to introduce an employer match (commonly in the 4-5% range). Our goal is to keep our retirement benefits competitive while we scale.

  • Top of the line, high-spec tech for everyone.

  • Sony noise-cancelling headphones and ergonomic setups to keep you comfortable and focused.

  • Personal company card to spend on tools that help you do your job - like ChatGPT Pro or anything else that boosts your workflow.

  • Periodic travel to London HQ and regular team socials.

  • 33 days of paid time off (PTO), including US federal holidays.

Due to U.S. export control regulations, candidates’ eligibility to work at Olix depends on their most recent citizenship or permanent residency status. We are generally unable to consider applicants whose most recent citizenship or permanent residence is in certain restricted countries (currently including Iran, North Korea, Syria, Cuba, Russia, Belarus, China, Hong Kong, Macau, and Venezuela). Applicants who have subsequently obtained citizenship or permanent residency in another country not subject to these restrictions may still be eligible.

We do not accept unsolicited CVs from recruitment agencies, will not be liable for any fees, and prohibit unauthorised use of our company name in recruitment activities.

Top Skills

Matlab
Numpy
Python
Simulink
Systemverilog
Uvm

Similar Jobs

16 Days Ago
Easy Apply
In-Office
Santa Clara, CA, USA
Easy Apply
70-90 Annually
Mid level
70-90 Annually
Mid level
Artificial Intelligence • Information Technology • Consulting
The Digital Design Verification Engineer will build verification environments, develop test plans, and collaborate on system-level verification, ensuring quality in production systems.
Top Skills: CCadence SkillDpi-CEda ToolsScriptingSystemcSystemverilogUvm
35 Minutes Ago
In-Office
Costa Mesa, CA, USA
191K-253K Annually
Expert/Leader
191K-253K Annually
Expert/Leader
Aerospace • Artificial Intelligence • Hardware • Robotics • Security • Software • Defense
The Technical Program Manager will oversee technical initiatives, manage project lifecycles, facilitate stakeholder communication, and ensure alignment across diverse teams while improving processes and managing risks.
Top Skills: ConfluenceJIRA
35 Minutes Ago
In-Office
Santa Ana, CA, USA
25-33 Annually
Entry level
25-33 Annually
Entry level
Aerospace • Artificial Intelligence • Hardware • Robotics • Security • Software • Defense
The Production Coordinator II will organize and coordinate production processes, manage parts flow, maintain accurate inventory data, and support various cross-functional teams. Responsibilities include logistics support, reporting, and ensuring compliance with production specifications.
Top Skills: ErpMesMrpMS OfficeNetSuiteOracleSQLTableau

What you need to know about the San Francisco Tech Scene

San Francisco and the surrounding Bay Area attracts more startup funding than any other region in the world. Home to Stanford University and UC Berkeley, leading VC firms and several of the world’s most valuable companies, the Bay Area is the place to go for anyone looking to make it big in the tech industry. That said, San Francisco has a lot to offer beyond technology thanks to a thriving art and music scene, excellent food and a short drive to several of the country’s most beautiful recreational areas.

Key Facts About San Francisco Tech

  • Number of Tech Workers: 365,500; 13.9% of overall workforce (2024 CompTIA survey)
  • Major Tech Employers: Google, Apple, Salesforce, Meta
  • Key Industries: Artificial intelligence, cloud computing, fintech, consumer technology, software
  • Funding Landscape: $50.5 billion in venture capital funding in 2024 (Pitchbook)
  • Notable Investors: Sequoia Capital, Andreessen Horowitz, Bessemer Venture Partners, Greylock Partners, Khosla Ventures, Kleiner Perkins
  • Research Centers and Universities: Stanford University; University of California, Berkeley; University of San Francisco; Santa Clara University; Ames Research Center; Center for AI Safety; California Institute for Regenerative Medicine

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account