Marvell Technology Logo

Marvell Technology

Digital IC Design Staff Engineer

Reposted 5 Hours Ago
Be an Early Applicant
In-Office
Santa Clara, CA
105K-158K Annually
Mid level
In-Office
Santa Clara, CA
105K-158K Annually
Mid level
Design and integrate ICs for SoC solutions, perform RTL coding and verification, analyze designs for VLSI architecture, and provide documentation.
The summary above was generated by AI

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

As a Digital IC Design Staff Engineer with Marvell, you’ll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Automotive, Storage, Security, and Networking. You’ll be part of a digital team of about eight people making a big impact on this organization, working on ultra-dense and performance Static Random Access Memory (SRAM) memory compilers.

What You Can Expect

  • Design and integrate IPs for System-on-Chip SoC solutions using state-of-art IC design methodologies, clock domain crossing (CDC)-based design and application-specific integrated circuit (ASIC) design flows.
  • Perform RTL coding and functional verification of design on block and system level using Verilog and hardware description language (HDL).
  • Perform synthesis and timing closure. Analyze and develop the functionality of IC design by utilizing the knowledge of logic design and related very-large-scale integration (VLSI) architecture, SCAN/design for testing (DFT) methodology, and test patterns.
  • Provide design documentation, description and requirements to Application Engineers, Test Engineers, and/or customers.

What We're Looking For

  • Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 3-5 years of related professional experience.
  • Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 2-3 years of experience.

Proficiency in the following skill sets gained during professional or academic experience:

  • RTL design, Verilog and/or SystemVerilog;
  • Synthesis tools such as Synopsys Design Compiler;
  • Clock Domain Crossing;
  • Scripting/programming language with at least one of the following: PERL, Python, TCL, C/C++.
  • STA and timing closure; Lower power design techniques.

Expected Base Pay Range (USD)

105,470 - 158,000, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements 

At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at [email protected].

Interview Integrity
 

As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.
 
Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

#LI-NF1

Top Skills

C/C++
Perl
Python
Synopsys Design Compiler
Systemverilog
Tcl
Verilog
HQ

Marvell Technology Santa Clara, California, USA Office

5488 Marvell Ln, Santa Clara, CA, United States, 95054

Similar Jobs

3 Hours Ago
Hybrid
67 Locations
99K-232K Annually
Senior level
99K-232K Annually
Senior level
Artificial Intelligence • Professional Services • Business Intelligence • Consulting • Cybersecurity • Generative AI
Lead the development of data solutions using Palantir Foundry, mentor junior staff, manage client accounts, and uphold project standards.
Top Skills: Palantir FoundryPythonTypescript
3 Hours Ago
Hybrid
46 Locations
124K-280K Annually
Expert/Leader
124K-280K Annually
Expert/Leader
Artificial Intelligence • Professional Services • Business Intelligence • Consulting • Cybersecurity • Generative AI
Manage testing and quality assurance within the banking domain, engage with clients, develop diverse teams, and uphold ethical standards while driving project success.
Top Skills: Ci/Cd PipelinesDevOpsOracle Finance And Financials CloudOracle FinancialsSeleniumSQL
3 Hours Ago
Hybrid
23 Locations
124K-280K Annually
Senior level
124K-280K Annually
Senior level
Artificial Intelligence • Professional Services • Business Intelligence • Consulting • Cybersecurity • Generative AI
Lead CCaaS workstreams by managing entire delivery lifecycle, client partnerships, and cross-functional teams to ensure operational excellence and project success.
Top Skills: Bi/Analytics ToolsCcaas PlatformsPower BITelephony MigrationsWfm Tools

What you need to know about the San Francisco Tech Scene

San Francisco and the surrounding Bay Area attracts more startup funding than any other region in the world. Home to Stanford University and UC Berkeley, leading VC firms and several of the world’s most valuable companies, the Bay Area is the place to go for anyone looking to make it big in the tech industry. That said, San Francisco has a lot to offer beyond technology thanks to a thriving art and music scene, excellent food and a short drive to several of the country’s most beautiful recreational areas.

Key Facts About San Francisco Tech

  • Number of Tech Workers: 365,500; 13.9% of overall workforce (2024 CompTIA survey)
  • Major Tech Employers: Google, Apple, Salesforce, Meta
  • Key Industries: Artificial intelligence, cloud computing, fintech, consumer technology, software
  • Funding Landscape: $50.5 billion in venture capital funding in 2024 (Pitchbook)
  • Notable Investors: Sequoia Capital, Andreessen Horowitz, Bessemer Venture Partners, Greylock Partners, Khosla Ventures, Kleiner Perkins
  • Research Centers and Universities: Stanford University; University of California, Berkeley; University of San Francisco; Santa Clara University; Ames Research Center; Center for AI Safety; California Institute for Regenerative Medicine

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account