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Mirafra Technologies

Formal Verification Engineer

Posted 20 Days Ago
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In-Office
San Diego, CA
Mid level
In-Office
San Diego, CA
Mid level
Perform formal and functional verification for ASIC/digital designs using assertion languages (SVA/SystemVerilog), EDA formal tools, and verification methodologies. Develop scripts and automation using shell, Perl, Java, and manage revisions with CVS/DesignSync/Subversion. Collaborate on verification plans and use C/C++/SystemC as needed.
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Company Description

About Mirafra :
    Mirafra is software service base organization started in 2004.

     We are 500+ employees in India and 250+ In US
    Clear visibility to senior management which helps for constant professional growth

Job Description

Experience with the following: - ASIC design process, digital design, design (hw/sw) verification tools and techniques, computer architecture, etc. -Design and assertion languages: VHDL, Verilog, System Verilog, and System Verilog Assertions (SVA), Experience with Formal Verification is a must


Qualifications

Experience in functional verification EDA tools: VCS, IUS, ModelSim, Jasper, 0-in, IFV, OneSpin, SLEC, etc is highly desired - Familiar with programming languages: C, C++, and SystemC - Scripting and automation skills: Unix/Linux shell programming, Perl, Java, Makefile, XML, XML DOM, XPath, XSLT, revision management (e.g. CVS, DesignSync, Subversion

Additional Information

All your information will be kept confidential according to EEO guidelines.

Mirafra Technologies San Jose, California, USA Office

San Jose, United States

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