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Altera (altera.com)

FPGA Development Tools Engineer

Reposted 4 Days Ago
Be an Early Applicant
In-Office
San Jose, CA, USA
127K-184K Annually
Mid level
In-Office
San Jose, CA, USA
127K-184K Annually
Mid level
The FPGA Development Tools Engineer will develop data models using C++ and Python, create high-performance APIs, and collaborate across teams to enhance FPGA design software for Quartus.
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Job Details:

Job Description:

About the Job 

Altera is one of the world's leading providers of programmable solutions. With a renewed focus on agility, software-first, and AI-driven solutions, Altera is shaping the future of computing by providing flexible technology, empowering innovators with scalable products, from high-performance to power- and cost-optimized devices for cloud, network, and edge applications. Join us in our journey to becoming the #1 FPGA provider in the world as we redefine the next era of programmable innovations! 

 

The Database, Infrastructure & Tooling (DBIT) Team plays a critical role in bringing Altera’s next-generation FPGA devices to Quartus Prime, our flagship design software. As the bridge between hardware and software, DBIT defines and implements how FPGA devices are modeled within Quartus. If you’re excited about solving complex engineering problems and working at the intersection of hardware and software, DBIT is the place for you. 

 

We are looking for a seasoned software engineer to help us shape Altera’s industry-leading FPGA design software. You will work on initiatives like lightweight yet scalable data models to represent increasingly sophisticated FPGA architectures while maintaining high-performance APIs that power Quartus’ state-of-the-art algorithms and data structures. 

 

What You Will Do 

As an EDA Software Engineer for the DBIT team, your responsibilities include, but are not limited to: 

  • Using C++ and Python to specify, implement and maintain software data models to represent FPGA devices. 

  • Developing high-performance APIs to streamline the access to FPGA device databases to industry-leading algorithms for synthesis, placement, routing, timing analysis, power analysis, among others. 

  • Collaborating with multiple hardware and software teams while bringing the next-generation FPGA devices to Quartus. 

  • Developing tools to aid/enhance Altera’s FPGA device bring-up processes. 

The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.  

$127.4K - $184.4K USD 

 

We use artificial intelligence to screen, assess, or select applicants for the position. Applicants must be eligible for any required U.S. export authorizations. 

Qualifications:

What We Want to See 

  • Real passion for software engineering: 

  • Bachelor’s Degree in Computer Science, Computer Engineering or related fields with 4+ years of experience; OR 

  • Master’s Degree in Computer Science, Computer Engineering or related fields with 3+ years of experience; OR 

  • Ph.D. degree in Computer Science, Computer Engineering or related fields with 1+ years of experience. 

  • Excellent programming skills in C/C++ and Python. 

  • Excellent written and verbal communication skills. 

 

Ways to Stand Out from the Crowd 

  • Advanced background on algorithms and data structures. 

  • Experience developing EDA tools. 

  • Exceptional problem-solving skills. 

  • Background on graph-based algorithms. 

  • Background on HDL design using Verilog, SystemVerilog, and/or VHDL. 

  • Experience developing and maintaining internal applications and APIs. 

 

Ways to Earn Extra Points 

  • Experience with FPGA architecture and tools. 

  • Experience developing FPGA tools. 

Job Type: Regular

Shift:Shift 1 (United States of America)

Primary Location:San Jose, California, United States

Additional Locations:

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Top Skills

C++
Hdl
Python
Systemverilog
Verilog
Vhdl
HQ

Altera (altera.com) San Jose, California, USA Office

101 Innovation Dr, San Jose, California, United States, 95134

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