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Alphawave IP, Inc.

IC Design QA Engineer

Reposted 11 Days Ago
Be an Early Applicant
In-Office
2 Locations
155K-185K Annually
Expert/Leader
In-Office
2 Locations
155K-185K Annually
Expert/Leader
The IC Design QA Engineer will implement quality gates, monitor IC designs, perform DFMEA, improve processes, and collaborate with teams to ensure product quality.
The summary above was generated by AI

The Opportunity

We're looking for the Wavemakers of tomorrow.

Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology.

What you'll do:

  • Establish and implement quality gates throughout the IC design process, between RTL and PD, to ensure compliance with industry standards and customer requirements. Work collaboratively with groups from architecture, DFT, PD, and design verification to ensure designs are delivered on time and with the highest quality.
  • Continuously monitor and audit IC designs to identify and address potential quality issues, ensuring designs meet specified criteria. Perform analysis of coverage metrics to ensure conformity with design specification and verification plan.
  • Collaborate with cross-functional teams to understand and incorporate customer requirements into the design quality assurance process.
  • DFMEA (Design Failure Mode and Effects Analysis): Perform DFMEA to systematically evaluate potential failure modes in the design phase and ensure robust design solutions. Provide training and support.
  • Maintain comprehensive documentation of quality assurance processes, audit results, and corrective actions.
  • Identify opportunities for process improvements and implement best practices to enhance design quality and efficiency. Participate in establishing/improving CAD and design flow methodologies.
  • Drive design phase end reviews to closure by meeting customer and internal quality and reliability metrics.
  • Assist in evaluating impact of Customer functional ECOs on device meeting requirements.

What you'll need:

  • 10+yrs of experience in Semiconductor Industry with MS or PhD in Electrical EE or Physics
  • Knowledge of the ASIC design flow, synthesis, static timing analysis, scripting, and netlist generation.
  • Hands-on experience in STA, PD, and PDV.
  • Exposure to industry standard Timing, Logic Equivalence, Physical Design and Synthesis tools.
  • Knowledge of basic SoC Architecture and HDL languages like Verilog to collaborate with our logic design team for timing fixes and functional ECOs.
  • Experience in design 7nm node and below a plus.
  • Familiarity with DFT and physical design backend related methods and tools.
  • Experience with integration of high-speed interface IPs, such as UCIe, DDR, and HBM a plus.
  • Experience with 2.5D design a plus.
  • Experience with Layout tools a plus
  • A good understanding of basic failure mechanisms

Salary and Benefits

Your contribution will be recognized with a base salary within the range of $155,000 to $185,000 annually as It is influenced by your qualifications, experience, location, and the internal equity of our team to ensure fairness and consistency across roles. In addition to our comprehensive benefits package, employees are also eligible for additional compensation opportunities, including a short-term incentive program, Retirement & Saving Programs and participation in the Employee Stock Purchase Plan (ESPP)

You’ll also be eligible for competitive benefits described as per below:

 

Health & Wellness

Our programs emphasize knowledge and prevention, helping you stay proactive and prepared to manage your health at every stage.

  • Comprehensive health plans
  • Wellness Spending Account (WSA)
  • Employee Assistance Program (EAP)​ 

Time Off

We value the importance of rest and recharge, which is why we offer flexible time off options to support your well-being.

  • Paid Vacation
  • Paid Holidays
  • Parental Leave

Equal Employment Opportunity Statement

Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process.

Top Skills

Asic Design Flow
Dft
Hdl
Pd
Pdv
Sta
Verilog

Alphawave IP, Inc. San Jose, California, USA Office

1730 N 1st St, Suite 650, San Jose, CA, United States, 95112

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