xAI Logo

xAI

Network Engineer - ML Infrastructure (High-Speed Interconnects)

Reposted 5 Hours Ago
Be an Early Applicant
In-Office
Palo Alto, CA, USA
180K-440K Annually
Senior level
In-Office
Palo Alto, CA, USA
180K-440K Annually
Senior level
Design, build, and optimize high-speed interconnects for AI ML clusters, manage vendor relations, and drive innovation in connectivity solutions.
The summary above was generated by AI
ABOUT xAI

xAI’s mission is to create AI systems that can accurately understand the universe and aid humanity in its pursuit of knowledge. Our team is small, highly motivated, and focused on engineering excellence. This organization is for individuals who appreciate challenging themselves and thrive on curiosity. We operate with a flat organizational structure. All employees are expected to be hands-on and to contribute directly to the company’s mission. Leadership is given to those who show initiative and consistently deliver excellence. Work ethic and strong prioritization skills are important. All employees are expected to have strong communication skills. They should be able to concisely and accurately share knowledge with their teammates.

ABOUT THE ROLE:

xAI is building at a furious pace with the latest compute and switching hardware to help people understand the universe.  We are looking for exceptional ML Infrastructure Engineers with deep expertise in high-speed interconnect technologies to design, build, and optimize the network fabric that powers large-scale AI training and inference clusters.  This strategic role will drive innovation in high-bandwidth, low-latency, power-efficient interconnects critical for AI/ML clusters based on advanced computing platforms.

You will have the opportunity to work on all modalities of interconnects connecting GPUs and switches both inside and between data centers, including our primary front and backend networks that train Grok and that customers use for inference. Engineers will own all aspects from design and development to build and operations. You will be expected to define and improve team processes and to contribute to scaling and maintenance efforts.

You will focus on the physical layer and system-level integration of copper (ACC, AEC, CPC) and optical (FRO, LRO/TRO, LPO, AOC, CPO) interconnects that directly determine the performance, power efficiency, scale, and cost of next-generation AI/ML clusters.  This is a highly technical, hands-on role bridging ML cluster requirements with cutting-edge interconnect hardware — ideal for engineers who love both large-scale AI systems and the physics/engineering of 200G+ SerDes, PAM4, photonics, signal integrity and diagnostics.

RESPONSIBILITIES:
  • Design, validate, and productize high-speed copper and optical connectivity solutions for AI clusters (100k+ GPU scale).
  • Own vendor due diligence and onboarding for new 1.6T products including AEC and pluggable optical transceivers (DR4/8, FR4) including rigorous bring-up & characterization.
  • Investigate the opportunity for LPO and LRO in our network.
  • Evaluate early co-packaged and near-packaged engines for switches and GPUs.
  • Pathfinding for new interconnect modalities including VCSEL, microLED, THz radio-based solutions to improve network economics and reliability.
  • Work closely with vendors (transceiver, cable, SerDes, DSP, silicon photonics foundries) to influence roadmaps and ensure timely delivery of next-gen solutions.
  • Collaborate with ML training teams to translate workload communication patterns into concrete interconnect topology and optical reconfigurability requirements.
  • Perform system-level simulation of end-to-end fabric performance.
  • Drive failure analysis, root cause, and corrective actions for interconnect-related issues in production clusters through fleet-level metrics gathering and analysis.
  • Contribute to internal tooling and automation for interconnect health monitoring, telemetry, diagnostics, remediation and automated qualification pipelines.
  • Stay current with industry standards (OIF CMIS, IEEE) and emerging technologies (multi-core/hollow-core fiber, 448G SerDes, TFLN, ring resonators)
BASIC QUALIFICATIONS:
  • At least 8+ years of hands-on experience in designing, deploying and operating high-speed copper and optical interconnects, preferably in a module design role or in a hyperscale datacenter environment.
  • Master's or PhD degree in Electrical Engineering, Photonics or Physics.
  • Deep knowledge of PAM4 SerDes performance, equalization, jitter, crosstalk.
  • Solid operational understanding of FEC, Retimers, TIAs and Drivers.
  • Deep knowledge of optical link budget analysis and performance metrics including TDECQ, OMA, Tcode, stressed receiver sensitivity and associated diagnostics.
  • Expertise in transceiver components including CW lasers, SiPh PICs, EML, DSP, passive subassemblies, their failure modes and characterization.
  • Knowledge of thermal, mechanical, power, signal integrity constraints in dense hardware.
  • Knowledge of SiPh design process, yield improvement and reliability testing.
  • Familiarity with CPO technologies and challenges/risk areas.
  • Familiarity with subcomponent supply chains and global manufacturers, ODMs and CMs.
  • Strong problem-solving skills and ability to thrive in a fast-paced, ambiguous setting.
COMPENSATION AND BENEFITS:

$180,000 - $440,000 USD

Base salary is just one part of our total rewards package at X, which also includes equity, comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, and various other discounts and perks.

xAI is an equal opportunity employer. For details on data processing, view our Recruitment Privacy Notice.

HQ

xAI San Francisco, California, USA Office

3180 18th St., San Francisco, CA, United States

xAI Palo Alto, California, USA Office

1450 Page Mill Road, Palo Alto, CA, United States

Similar Jobs

35 Minutes Ago
Easy Apply
Hybrid
San Francisco, CA, USA
Easy Apply
120K-155K Annually
Senior level
120K-155K Annually
Senior level
Fintech • Payments • Financial Services
Support assessment and resolution of escalated compliance matters, analyze AML/CFT and integrity risks, partner with commercial and first-line teams to apply risk-based solutions, help develop compliance frameworks and escalation procedures, identify automation opportunities, and collaborate globally to ensure compliant onboarding and operations.
35 Minutes Ago
Easy Apply
Hybrid
San Francisco, CA, USA
Easy Apply
120K-155K Annually
Senior level
120K-155K Annually
Senior level
Fintech • Payments • Financial Services
Support assessment and resolution of escalated compliance matters across AML/CFT, integrity, and regulatory obligations. Partner with legal, risk, commercial, and operations to provide risk-based solutions, develop compliance frameworks, improve escalation procedures, and identify automation opportunities. Translate compliance issues into actionable steps and collaborate globally to execute compliance initiatives.
2 Hours Ago
Hybrid
Livermore, CA, USA
15-24 Hourly
Entry level
15-24 Hourly
Entry level
eCommerce • Fashion • Retail • Sales • Wearables • Design
Maintain organized, customer-ready store by processing deliveries, stocking the sales floor, executing price changes and markdowns, auditing inventory/shrinkage, and supporting daily operational standards and cleanliness.
Top Skills: Omnichannel SellingSocial Media

What you need to know about the San Francisco Tech Scene

San Francisco and the surrounding Bay Area attracts more startup funding than any other region in the world. Home to Stanford University and UC Berkeley, leading VC firms and several of the world’s most valuable companies, the Bay Area is the place to go for anyone looking to make it big in the tech industry. That said, San Francisco has a lot to offer beyond technology thanks to a thriving art and music scene, excellent food and a short drive to several of the country’s most beautiful recreational areas.

Key Facts About San Francisco Tech

  • Number of Tech Workers: 365,500; 13.9% of overall workforce (2024 CompTIA survey)
  • Major Tech Employers: Google, Apple, Salesforce, Meta
  • Key Industries: Artificial intelligence, cloud computing, fintech, consumer technology, software
  • Funding Landscape: $50.5 billion in venture capital funding in 2024 (Pitchbook)
  • Notable Investors: Sequoia Capital, Andreessen Horowitz, Bessemer Venture Partners, Greylock Partners, Khosla Ventures, Kleiner Perkins
  • Research Centers and Universities: Stanford University; University of California, Berkeley; University of San Francisco; Santa Clara University; Ames Research Center; Center for AI Safety; California Institute for Regenerative Medicine

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account