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SK hynix

Principal Engineer, Analog/Mixed-Signal Circuit Design

Reposted 15 Days Ago
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In-Office
San Jose, CA
180K-230K Annually
Expert/Leader
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In-Office
San Jose, CA
180K-230K Annually
Expert/Leader
The Principal Engineer in Analog/Mixed-Signal Circuit Design will design high-performance circuits, oversee schematic design, guide teams, and drive architectural decisions for next-gen interface solutions.
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Job Title: Principal Engineer, Analog/Mixed-Signal Circuit Design
Office Location: San Jose, CA
Job Type: Full-Time
Work Model: Onsite 
      
About SK hynix America
At SK hynix America, we're at the forefront of semiconductor innovation, developing advanced memory solutions that power everything from smartphones to data centers. As a global leader in DRAM and NAND flash technologies, we drive the evolution of advancing mobile technology, empowering cloud computing, and pioneering future technologies. Our cutting-edge memory technologies are essential in today's most advanced electronic devices and IT infrastructure, enabling enhanced performance and user experiences across the digital landscape.
We're looking for innovative minds to join our mission of shaping the future of technology. At SK hynix America, you'll be part of a team that's pioneering breakthrough memory solutions while maintaining a strong commitment to sustainability. We're not just adapting to technological change – we're driving it, with significant investments in artificial intelligence, machine learning, and eco-friendly solutions and operational practices. As we continue to expand our market presence and push the boundaries of what's possible in semiconductor technology, we invite you to be part of our journey to creating the next generation of memory solutions that will define the future of computing.

Job Summary:

  • We are looking for a highly skilled and motivated Principal Engineer, Analog/Mixed-Signal Circuit Design to join our team. In this role, you will be responsible for the design and implementation of high-performance analog and mixed-signal circuits used in next-generation memory and interface solutions.

Responsibilities:

  • Design analog/mixed-signal circuits such as wireline transmitters/receivers, equalizers (CTLE/DFE), PLLs, CDRs, ADCs, DACs, voltage regulators, and bandgap references
  • Define and drive architecture for next-generation memory interface solutions
  • Collaborate with cross-functional teams to define system and circuit specifications and architecture
  • Perform schematic design, simulation, and silicon validation for top and block level circuits
  • Provide technical guidance to junior circuit designers
  • Supervise and guide layout/mask designers, providing floorplan and layout guidelines for optimal performance and area efficiency
  • Analyze circuit performance and support design sign-off and characterization
  • Document design methodology and contribute to continuous improvement of design flow

Qualification:   

  • BS in Electrical Engineering or a related field plus minimum 10 years of industry experience in analog and/or mixed-signal circuit design (or MS plus minimum 8 years of industry experience).
  • Solid understanding of analog and mixed-signal fundamentals including noise, matching, parasitics, and feedback systems
  • Proven hands-on design experience in one or more of the following: wireline transmitters/receivers, equalizers (CTLE/DFE), PLLs, CDRs, ADCs, DACs, voltage regulators, and bandgap references
  • Understanding of mixed-signal verification and post-silicon validation techniques
  • Ability to lead and coordinate with layout/mask teams and provide clear design guidance
  • Strong collaboration, communication, and problem-solving skill

Preferred Qualifications:

  • Ph.D in Electrical Engineering or a related field
  • Experience in high-speed interface design (e.g., PCIe, MIPI, SerDes, UCIe, memory interfaces or other high speed interface standards)
  • Familiarity with advanced FinFET process
  • Knowledge of circuit modeling using Verilog-A, matlab, etc.
  • Knowledge of hardware description languages (Verilog/SystemVerilog)
  • Experience with automation scripting (Python, Perl, Tcl, etc.) to enhance design efficiency

Benefits:       

  • Top Tier health insurance at no employee cost
  • Paid day offs: PTO + Company Holidays + Happy Fridays
  • Paid Parental Leave Program
  • 401k Matching
  • Educational reimbursement up to $10,000 per year
  • Donation Matching and volunteering opportunities
  • Corporate discount programs
  • Free Breakfast/Lunch/Dinner provided to employees

Equal Employment Opportunity:

SKHYA is an Equal Employment Opportunity Employer. We provide equal employment opportunities to all qualified applicants and employees and prohibit discrimination and harassment of any type without regard to race, sex, pregnancy, sexual orientation, religion, age, gender identity, national origin, color, protected veteran or disability status, genetic information or any other status protected under federal, state, or local applicable laws. 


Compensation:

Our compensation reflects the cost of labor across several U.S. geographic markets, and we pay differently based on those defined markets. Pay within the provided range varies by work location and may also depend on job-related skills and experience. Your Recruiter can share more about the specific salary range for the job location during the hiring process.

Pay Range
$180,000$230,000 USD

Top Skills

Analog Circuit Design
Matlab
Mixed-Signal Circuit Design
Perl
Python
Systemverilog
Tcl
Verilog
Verilog-A
HQ

SK hynix San Jose, California, USA Office

3101 N. 1st St, San Jose, CA, United States, 95134

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