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NVIDIA

Principal Photonics IC Design Engineer

Posted 2 Months Ago
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In-Office
Santa Clara, CA, USA
232K-368K Annually
Senior level
In-Office
Santa Clara, CA, USA
232K-368K Annually
Senior level
Lead end-to-end photonic IC (PIC) product delivery from architecture through tapeout and silicon validation. Drive cross-functional execution, schedule and milestone management, and PIC architecture for high-speed/DWDM transceivers. Improve Cadence-based design methodology and automation, and mentor a team of photonics designers.
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NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 fueled the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Make the choice and join us today!

NVIDIA's Mixed-Signal Design (MSD) Photonics team is building the next generation of co-packaged optical interconnects to power the world's most advanced AI supercomputers. We are looking for a Principal Photonics IC Design Engineer to serve as the technical lead owning our photonics integrated circuit (PIC) product — from architecture definition through production tapeout and silicon validation.

What you will be doing:

  • Own end-to-end PIC product delivery: architecture, design, layout, DRC/LVS verification, tapeout, and post-silicon validation on advanced silicon photonics platforms

  • Lead cross-functional execution across photonic device, analog/mixed-signal, packaging, and systems teams

  • Drive tapeout schedules, define design milestones, and resolve critical path issues across multiple concurrent PIC programs

  • Architect optical transceiver PICs integrating modulators, photodetectors, wavelength multiplexing, waveguides, and optical couplers for high-speed and/or DWDM applications

  • Define and improve PIC design methodology, automation (e.g., scripted DRC, parameterized cells), and verification flows in Cadence and related EDA tools

  • Mentor and technically guide a team of photonics designers; set technical direction for the photonics PIC roadmap

What We Need to See:

  • PhD in Electrical Engineering, Physics, Applied Physics, or a closely related field with emphasis on integrated photonics, silicon photonics, or photonic device physics (or equivalent experience).

  • 8+ years of industry experience in photonics IC design, with demonstrated progression into technical leadership roles

  • Deep hands-on expertise with Cadence design environment (Virtuoso, PCell development, SKILL scripting) for photonic IC layout and simulation

  • Proven track record of production tapeouts — you have personally driven PICs from design through GDS signoff on a foundry silicon photonics process

  • Strong understanding of photonic device physics: waveguides, passive/active components, ring/MZI modulators, photodetectors, optical couplers

  • Demonstrated technical leadership: setting project scope, making architecture tradeoffs, driving cross-team alignment, and delivering on schedule

Ways to Stand Out From the Crowd:

  • Experience with high-speed (>50 Gbaud) optical modulator or receiver PIC design for datacom/telecom applications

  • Experience with DWDM PIC architectures (MUX/DEMUX, multi-channel transceivers, wavelength tuning)

  • Familiarity with co-packaged optics (CPO) system requirements and advance packaging integration

  • Experience with photonic circuit simulation and CAD tools (Ansys Lumerical, ZeMax, Cadence, MATLAB, Python and Verilog-A) and electromagnetic solvers (FDTD, FDE, EME)

  • Track record of publications and/or patents in silicon photonics

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 232,000 USD - 368,000 USD.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until August 16, 2026.

This posting is for an existing vacancy. 

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

HQ

NVIDIA Santa Clara, California, USA Office

2701 San Tomas Expressway, Santa Clara, CA, United States, Santa Clara

NVIDIA San Francisco, California, USA Office

San Francisco, United States

NVIDIA San Jose, California, USA Office

San Jose, United States

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