Arm Logo

Arm

Principal Signoff Methodology Engineer

Posted 4 Days Ago
Be an Early Applicant
In-Office
Austin, TX
241K-326K Annually
Senior level
In-Office
Austin, TX
241K-326K Annually
Senior level
Develop and optimize signoff methodologies for silicon design, focusing on PPA, reliability, and implementing automation with AI techniques.
The summary above was generated by AI
Arm is shaping the next generation of silicon design by combining computing, AI, and multiphysics to redefine how future SoCs are designed, implemented, and verified. Our Signoff Methodology Team develops intelligent, automated environments for timing, IR, thermal, and reliability analysis across advanced process nodes and emerging 2.5D/3D SoC integration technologies.
This is a hands-on engineering role - you will write production-quality code, design automation flows, and integrate AI-driven techniques to advance the future of signoff methodology and intelligent silicon design.
We are currently hiring across three locations: San Jose, Austin, and San Diego
Responsibilities:
  • Develop and code advanced signoff and implementation methodologies to optimize power, performance, area (PPA), yield, and time-to-market.
  • Design and standardize Static Timing Analysis (STA) and signoff features used across all Arm silicon groups.
  • Architect and automate signoff methodologies for STA, thermal, IR, and reliability - optimized for multiphysics accuracy, runtime efficiency, and scalability across large SoCs.
  • Build and maintain automation frameworks integrating machine learning and data analytics for predictive design closure.
  • Collaborate with Arm silicon design teams and EDA partners to standardize and scale signoff methodologies across multiple technology nodes.
  • Develop data pipelines and visualization tools to monitor and optimize PPA, reliability, and yield metrics.
  • Drive innovation in signoff methodology for advanced process technologies, ensuring readiness for new multiphysics effects - including 3DIC integration, thermal, dynamic IR, and reliability modeling.

Required Skills and Experience :
  • 8-12 years of experience in SoC signoff or physical implementation methodology, including STA timing, reliability, and IR analysis, on advanced technology nodes.
  • Strong programming and automation expertise in Python, TCL, or similar scripting languages.
  • Deep understanding of timing closure, silicon correlation, and reliability modeling.
  • Solid working knowledge of machine learning, statistical analysis, or AI-assisted flow development.
  • Experience collaborating with EDA vendors on methodology development or feature enablement.

"Nice To Have" Skills and Experience :
  • M.S. or Ph.D. in Electrical Engineering, Computer Engineering, or a related field.
  • Familiarity with innovative AI, including GenAI and LLM-based tools, for data-centric design automation.
  • Strong problem-solving, algorithmic, and analytical thinking, with attention to scalability and reproducibility.
  • Effective communication and technical leadership across multi-functional teams.

Our 10x mindset guides how we engineer, collaborate, and grow. Understand what it means and how to reflect 10x in your work: https://careers.arm.com/en/10x-mindset
Salary Range:
$241,100-$326,100 per year
We value people as individuals and our dedication is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process.
Accommodations at Arm
At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email [email protected] . To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process.
Hybrid Working at Arm
Arm's approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team's needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.
Equal Opportunities at Arm
Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don't discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.

Top Skills

AI
Automation Frameworks
Data Analytics
Machine Learning
Python
Tcl

Arm San Jose, California, USA Office

150 Rose Orchard Way, San Jose, CA, United States, 95134

Similar Jobs at Arm

3 Days Ago
In-Office
Austin, TX, USA
191K-259K Annually
Expert/Leader
191K-259K Annually
Expert/Leader
Artificial Intelligence • Internet of Things • Semiconductor
Seeking a SoC Performance and Power Modeling Architect with extensive experience in performance modeling, workload characterization, and architectural solutions for semiconductor design.
Top Skills: CC++GitPythonSubversionSystemc TlmUnix
4 Days Ago
In-Office
Austin, TX, USA
157K-212K Annually
Mid level
157K-212K Annually
Mid level
Artificial Intelligence • Internet of Things • Semiconductor
Develop and maintain high-quality networking software for Arm platforms, optimize performance, collaborate with global partners, and contribute to open-source communities.
Top Skills: CC++DpdkGitKubernetesLibfabricNcclOnecclOpenmpiRoceSnortVpp
4 Days Ago
In-Office
Austin, TX, USA
241K-326K Annually
Expert/Leader
241K-326K Annually
Expert/Leader
Artificial Intelligence • Internet of Things • Semiconductor
Lead offensive security analysis for SoC and chiplet architectures, identifying vulnerabilities and influencing security practices across projects.
Top Skills: AmbaCaliptraComputer ArchitectureCxlDiceMicro ArchitecturePcieRtlSystemverilogTrusted FirmwareUbootUefiVerilog

What you need to know about the San Francisco Tech Scene

San Francisco and the surrounding Bay Area attracts more startup funding than any other region in the world. Home to Stanford University and UC Berkeley, leading VC firms and several of the world’s most valuable companies, the Bay Area is the place to go for anyone looking to make it big in the tech industry. That said, San Francisco has a lot to offer beyond technology thanks to a thriving art and music scene, excellent food and a short drive to several of the country’s most beautiful recreational areas.

Key Facts About San Francisco Tech

  • Number of Tech Workers: 365,500; 13.9% of overall workforce (2024 CompTIA survey)
  • Major Tech Employers: Google, Apple, Salesforce, Meta
  • Key Industries: Artificial intelligence, cloud computing, fintech, consumer technology, software
  • Funding Landscape: $50.5 billion in venture capital funding in 2024 (Pitchbook)
  • Notable Investors: Sequoia Capital, Andreessen Horowitz, Bessemer Venture Partners, Greylock Partners, Khosla Ventures, Kleiner Perkins
  • Research Centers and Universities: Stanford University; University of California, Berkeley; University of San Francisco; Santa Clara University; Ames Research Center; Center for AI Safety; California Institute for Regenerative Medicine

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account