Broadcom Logo

Broadcom

R&D ENGINEER IC DESIGN

Posted 12 Days Ago
Be an Early Applicant
In-Office
San Jose, CA
120K-192K Annually
Senior level
In-Office
San Jose, CA
120K-192K Annually
Senior level
Responsible for micro-architecture, design, RTL coding, debugging, and synthesis of functional blocks in network switch products. Collaborate with Physical Design team and execute post-silicon debugging.
The summary above was generated by AI

Please Note:

1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)

2. If you already have a Candidate Account, please Sign-In before you apply.

Job Description:

The Network Switch Group at Broadcom has brought some of the most complex and cutting edge networking ASIC's and multi-chip solutions to market. The group develops ASIC's for L2/L3 switching and routing for various market segments. These products support the latest networking protocols and features as well as manage extremely large volumes of traffic in the order of tens of Terabits/sec. These networking ASIC's support a large number of ports and port speeds ranging from tens of Mb/s to hundreds of Gb/s as well as various line interfaces and protocols.

You will be responsible for the micro-architecture, design, RTL coding, debugging and synthesis of complex functional blocks in the Traffic Manager / Memory Management Unit used in Broadcom’s market leading network switch products.

Responsibilities include:

  • High quality micro-architecture and design specifications

  • Verilog RTL coding and synthesis

  • Testplan reviews, assertions, debugging, code and functional coverage

  • Floor plan, timing, congestion resolution with Physical Design team

  • Post silicon bring-up, debug, failure analysis.

BS and 8+ years of related experience or MS and 6+ years of relevant experience

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $120,000 - $192,000

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Top Skills

Verilog
HQ

Broadcom San Jose, California, USA Office

1320 Ridder Park Drive, San Jose, CA, United States, 95131

Similar Jobs

4 Days Ago
In-Office
Irvine, CA, USA
127K-203K Annually
Expert/Leader
127K-203K Annually
Expert/Leader
Semiconductor
The R&D IC Design Engineer collaborates on chip design for high-speed communication, develops design specs, conducts simulations, and manages design validation and performance analysis.
Top Skills: CPythonUnix/Perl ScriptingVerilogVhdl
4 Days Ago
In-Office
Irvine, CA, USA
91K-146K Annually
Senior level
91K-146K Annually
Senior level
Semiconductor
The role involves designing chips for high-speed optical communication, including RTL coding, design validation, and silicon debug tasks.
Top Skills: CPerlPythonUnixVerilogVhdl
4 Days Ago
In-Office
Irvine, CA, USA
91K-146K Annually
Senior level
91K-146K Annually
Senior level
Semiconductor
The R&D IC Design Engineer will work on high-speed optical communication chips, involving block-level design, RTL coding, simulations, and silicon validation.
Top Skills: CPythonUnix/Perl ScriptingVerilogVhdl

What you need to know about the San Francisco Tech Scene

San Francisco and the surrounding Bay Area attracts more startup funding than any other region in the world. Home to Stanford University and UC Berkeley, leading VC firms and several of the world’s most valuable companies, the Bay Area is the place to go for anyone looking to make it big in the tech industry. That said, San Francisco has a lot to offer beyond technology thanks to a thriving art and music scene, excellent food and a short drive to several of the country’s most beautiful recreational areas.

Key Facts About San Francisco Tech

  • Number of Tech Workers: 365,500; 13.9% of overall workforce (2024 CompTIA survey)
  • Major Tech Employers: Google, Apple, Salesforce, Meta
  • Key Industries: Artificial intelligence, cloud computing, fintech, consumer technology, software
  • Funding Landscape: $50.5 billion in venture capital funding in 2024 (Pitchbook)
  • Notable Investors: Sequoia Capital, Andreessen Horowitz, Bessemer Venture Partners, Greylock Partners, Khosla Ventures, Kleiner Perkins
  • Research Centers and Universities: Stanford University; University of California, Berkeley; University of San Francisco; Santa Clara University; Ames Research Center; Center for AI Safety; California Institute for Regenerative Medicine

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account