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ASML

Senior mixed-signal electrical engineer (Board Level)

Reposted One Month Ago
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In-Office
San Jose, CA, USA
165K-248K Annually
Senior level
In-Office
San Jose, CA, USA
165K-248K Annually
Senior level
Lead design, analysis, and implementation of high-performance analog and mixed-signal circuits (high-speed ≥50 MSPS, ≥16-bit DAC/ADC chains and AFEs, high-voltage ±225V). Perform behavioral and SPICE modeling, simulation, lab validation, debugging, and system bring-up. Collaborate with digital/FPGA/power/software teams, support full product lifecycle (DV/EVT/manufacturing), produce documentation, and mentor junior engineers.
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Duties & Responsibilities 

  • Lead the design, analysis, and implementation of high-performance analog and mixed-signal circuits on board level, including: 

  • High-speed (>50 MSPS), high-precision (≥16-bit) DAC/ADC signal chains 

  • Low-noise, high-linearity, high dynamic range analog front-end (AFE) designs 

  • Design and develop precision high-voltage circuits with the following characteristics: 

  • High frequency (>5 MHz), low distortion, and ultra-low offset (<1 mV) 

  • Operation in high-voltage environments up to ±225V, with robust stability and reliability 

  • Architect and optimize complete end-to-end signal chains, including: 

  • DAC/ADC interfaces, amplification, filtering, driver stages, feedback loops, and calibration 

  • Perform modeling, simulation, and performance validation: 

  • Develop both system-level (behavioral) and circuit-level (SPICE) models 

  • Analyze key performance parameters such as noise, distortion, offset, drift, bandwidth, and stability 

  • Drive laboratory debugging, validation, and system bring-up: 

  • Utilize advanced lab equipment (oscilloscope, spectrum analyzer, network analyzer, etc.) 

  • Identify and resolve issues related to signal integrity, EMI/EMC, thermal effects, and parasitic 

  • Collaborate cross-functionally with digital, FPGA, system, power, and software teams: 

  • Define hardware/firmware/software interfaces 

  • Support system-level integration and validation 

  • Support full product lifecycle, from concept to volume production: 

  • Design validation (DV), engineering validation (EVT), and manufacturing support 

  • Root cause analysis (RCA) for field and production issues 

  • Drive adoption of advanced technologies and architectures in high-performance systems 

  • Produce high-quality documentation, including design specifications, simulation reports, and test reports 

  • Provide technical leadership and mentorship to junior engineers 

 

Education & Experience 

  • Master’s or PhD degree in Electrical Engineering or a related field 

  • Minimum 5+ years of experience in analog or mixed-signal circuit design (PhD graduates may qualify with less experience) 

  • Strong background in analog circuit fundamentals, with experience in: 

  • Operational amplifiers and precision analog design 

  • ADC/DAC interfacing and signal chain optimization 

  • High-speed and/or high-voltage analog systems 

  • Experience in one or more of the following areas is highly desirable: 

  • Low-noise design (nV/√Hz level) 

  • High-linearity systems (>16-bit ENOB) 

  • Precision measurement systems 

  • High-frequency analog design (MHz range and beyond) 

  • Proficiency in circuit simulation tools: 

  • LTspice, TINA, Cadence, ADS, or equivalent 

  • Programming skills for modeling and data analysis: 

  • Python, MATLAB, or similar 

  • Hands-on lab experience with measurement and debug tools: 

  • Oscilloscopes, function generators, spectrum analyzers, network analyzers 

 

Skills & Competencies 

Technical Expertise 

  • Deep understanding of non-ideal analog effects:  

  • Noise, distortion, offset, drift, parasitic 

  • Knowledge of signal integrity (SI) and power integrity (PI) principles 

  • Strong system-level thinking, able to optimize across full signal chains 

  • Ability to balance physical limitations with system performance requirements 

Analytical & Problem-Solving Skills 

  • Strong root cause analysis and debugging capabilities 

  • Ability to solve complex, cross-domain engineering problems 

  • Effective decision-making under uncertainty 

Work Style & Ownership 

  • Results-driven with strong ownership and accountability 

  • Capable of working effectively in high-pressure, dynamic environments 

  • Able to work both independently and collaboratively 

Communication Skills 

  • Clear, concise, and professional technical communication 

  • Ability to present complex technical concepts to both engineers and management 

Process Discipline 

  • Familiarity with full product development lifecycle (design → validation → production) 

  • Ability to work within structured processes and meet project timelines 

Tools 

  • Proficient in Microsoft Office Suite (Word, Excel, PowerPoint) 

  • Capable of producing high-quality technical documentation and presentations 

 

Preferred Qualifications 

  • Experience in high-end equipment or precision systems, such as: 

  • Semiconductor equipment (e.g., SEM, lithography, metrology systems) 

  • Precision control systems (e.g., scan control, motion control) 

  • High-speed data acquisition systems 

  • EDA tools, Xpedition preferred 

  • Familiarity with high-speed interfaces (e.g., JESD204B-based ADC systems) 

  • Experience working in global, cross-site teams 

  • Prior experience in technical leadership or leading complex subsystem development 

The current base annual salary range for this role is currently:

$165,375-248,063

Pay scales are determined by role, level, location and alignment with market data. Individual pay is determined through interviews and an assessment of several factors that that are unique to each candidate, including but not limited to job-related skills, relevant education and experience, certifications, abilities of the candidate and pay relative to other team members.

The Company offers employees and their families, medical, dental, vision, and basic life insurance. Employees are able to participate in the Company’s 401k plan. Employees will also receive eight (8) hours of vacation leave every month and (13) paid holidays throughout the calendar year. For more information, please contact the Recruiter or click on this link Compensation & Benefits in the US.

All new ASML jobs have a minimum application deadline of 10 days.

Inclusion and diversity

ASML is an Equal Opportunity Employer that values and respects the importance of a diverse and inclusive workforce. It is the policy of the company to recruit, hire, train and promote persons in all job titles without regard to race, color, religion, sex, age, national origin, veteran status, disability, sexual orientation, or gender identity. We recognize that inclusion and diversity is a driving force in the success of our company.

Need to know more about applying for a job at ASML? Read our frequently asked questions.

Request an Accommodation

ASML provides reasonable accommodations to applicants for ASML employment and ASML employees with disabilities.  An accommodation is a change in work rules, facilities, or conditions which enable an individual with a disability to apply for a job, perform the essential functions of a job, and/or enjoy equal access to the benefits and privileges of employment. If you are in need of an accommodation to complete an application, participate in an interview, or otherwise participate in the employee pre-selection process, please send an email to [email protected] to initiate the company’s reasonable accommodation process.

Please note: This email address is solely intended to provide a method for applicants to initiate ASML’s process to request accommodation(s). Any recruitment questions should be directed to the designated Talent Acquisition member for the position.

ASML San Jose, California, USA Office

399 West Trimble Road, San Jose, United States, 95131

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