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NVIDIA

Senior Package Layout Engineer - Hardware

Reposted 3 Hours Ago
Be an Early Applicant
In-Office or Remote
6 Locations
132K-253K Annually
Senior level
In-Office or Remote
6 Locations
132K-253K Annually
Senior level
The Senior Package Layout Engineer will collaborate on layout designs for IC substrates, optimize package layouts, and improve layout productivity using Cadence tools.
The summary above was generated by AI

NVIDIA's GPUs and SOCs are the world leaders in power, performance and efficiency. We are continually innovating to deliver new and creative, unusual solutions to extraordinary problems in a wide range of sectors. To this purpose, we are now seeking a hard-working Senior Package Layout Engineer who is committed to making a difference in the world through their contributions!

This position will collaborate with Technical Package Lead and different design teams in the design and development of sophisticated, detailed layout of IC substrates for NVIDIA products. In addition, work with design teams to plan schedules, resolve costs, manufacturing, and electrical design issues.

What you'll be doing:

  • As part of a Layout team, you will collaborate to implement high speed/density ASIC packages.

  • Perform substrate breakout patterns for ASIC packages.

  • Optimize package pinout incorporating system level trade-offs of pins assignment.

  • Help perform package routing, placement, stack-up, reference plane and power distribution using Cadence APD or SiP tool suite.

  • Propose layout design trade-offs to the Technical Package Lead for resolution and implementation.

  • Conduct design feasibility studies to evaluate the Package design goals for size, cost, and system performance.

  • Develop symbols and CAD library databases using Cadence APD design tools

  • Develop methodologies to improve layout productivity

What we need to see:

  • Hold a B.S. Electrical Engineering or equivalent experience

  • 5+ years experience in PCB Layout of graphics cards, motherboards, line cards or other related technology. Experience with HDI designs is a plus

  • Proven experience in substrate layout of wire bond and flip chip packages, preferred

  • Significant background with Cadence APD or SiP and/or PCB layout tools (including Constraint Manager)

  • Solid understanding of high-speed design signal integrity practices

  • Experience with Virtuoso and Calibre is a plus

  • Experience using Valor is helpful
     

NVIDIA is widely considered to be one of the technology world’s most desirable employers! We have some of the most forward-thinking and dedicated people in the world working for us. If you're creative and autonomous, we want to hear from you.

#LI-Hybrid

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 132,000 USD - 207,000 USD for Level 3, and 160,000 USD - 253,000 USD for Level 4.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until November 18, 2025.NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Top Skills

Cadence Apd
Calibre
Sip Tool Suite
Valor
Virtuoso
HQ

NVIDIA Santa Clara, California, USA Office

2701 San Tomas Expressway, Santa Clara, CA, United States, Santa Clara

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