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Marvell Technology

Senior Principal Hardware Engineer

Reposted Yesterday
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In-Office
Santa Clara, CA
165K-247K Annually
Senior level
In-Office
Santa Clara, CA
165K-247K Annually
Senior level
Lead the design and development of high-performance hardware platforms, specializing in signal integrity and high-speed interfaces for complex systems.
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About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

The Marvell post silicon validation group designs and develops test platforms for validating multi-core Arm-based Network processors and custom ASIC’s, used in many communication infrastructure applications such as 5G base stations, hard disk drive (HDD), Fiber Channel (FC), solid‐state drive (SSD), NICs, Data Center and Cloud Computing platforms.

What You Can Expect

We are seeking a highly skilled and experienced Board Architect to lead the design and development of high-performance hardware platforms. The ideal candidate will have deep expertise in signal integrity, schematic design, PCB layout, and high-speed interfaces such as PCIe, DDR, and Ethernet. You will play a critical role in defining system architecture, guiding board-level design, and ensuring signal integrity and performance across complex hardware systems.

  • Architect and design high-performance board-level systems for compute, networking, or storage applications.

  • Define and review schematics and PCB layouts with a focus on high-speed signal integrity and power integrity.

  • Lead the selection and integration of high-speed interfaces including PCIe Gen4/Gen5/Gen6, DDR3/4/5, and 10G/25G/100G/200G Ethernet.

  • Perform signal integrity (SI) and power integrity (PI) simulations and analysis using industry-standard tools (e.g., HyperLynx, Sigrity, ADS).

  • Collaborate with cross-functional teams including silicon, mechanical, thermal, and firmware engineers to ensure system-level optimization.

  • Drive design reviews and provide technical leadership throughout the product development lifecycle.

  • Work closely with manufacturing and test teams to ensure DFM/DFT compliance and robust bring-up processes.

  • Directly work with customer on the reference designs.

What We're Looking For

  • Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 15+ years of related professional experience OR Master’s degree in Computer Science, Electrical Engineering or related fields with 10-12 years of experience.

  • 10+ years of experience in board-level hardware design and architecture.

  • Proven expertise in high-speed digital design and signal integrity analysis.

  • Hands-on experience with schematic capture tools (e.g., Cadence OrCAD, Altium) and PCB layout tools (e.g., Allegro, Mentor).

  • Deep understanding of high-speed protocols: PCIe, DDR, Ethernet, USB, SATA, etc.

  • Strong analytical and problem-solving skills with a systems-level mindset.

  • Excellent communication and leadership skills.

  • This position is full-time onsite at Marvell's Santa Clara office.

Expected Base Pay Range (USD)

164,650 - 246,700, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements 

At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at [email protected].

Interview Integrity
 

As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.
 
Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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Top Skills

Ads
Allegro
Altium
Cadence Orcad
Ddr
Ethernet
Hyperlynx
Mentor
Pcb Layout
Pcie
Schematic Design
Signal Integrity
Sigrity
HQ

Marvell Technology Santa Clara, California, USA Office

5488 Marvell Ln, Santa Clara, CA, United States, 95054

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