Flux Computing Logo

Flux Computing

Senior / Staff Analog Design Engineer - High Speed SerDes

Posted 8 Days Ago
Be an Early Applicant
In-Office
San Francisco, CA
194K-270K Annually
Senior level
In-Office
San Francisco, CA
194K-270K Annually
Senior level
Design and verify high-speed SerDes cores and adaptive clock-data-recovery systems, ensuring robust performance in multi-standard interfaces. Mentor junior engineers and establish best practices in mixed-signal design.
The summary above was generated by AI

The Role

We are seeking an experienced Analog /RF IC designer to architect, implement and productise the multi‑lane, multi‑standard SerDes (serialiser / deserialiser) interfaces that move data in and out of the OTPU at tens of gigabits per second per lane. You will own both transmit and receive paths—equalisers, CDRs, drivers, samplers and clocking assist blocks—while ensuring robust operation over challenging channels and across multiple aggregated lanes. Your designs will be central to realising Flux’s multi‑terabit‑per‑second optical fabric.

Responsibilities

  • Define, design and verify SerDes cores operating at >25Gb/s‑per‑lane, including TX FIR/DFE equalisation, CTLE/FFE receivers, decision‑feedback paths, and high‑linearity output drivers.

  • Develop adaptive clock‑data‑recovery (CDR) loops and multi‑lane deskew / phase‑alignment schemes that achieve < 200 fs rms additive jitter and < 5 ps lane‑to‑lane skew.

  • Model channel losses (PCB, package, fibre) and work with signal‑integrity engineers to co‑optimise link budgets, impedance control and return‑loss targets.

  • Partner tightly with analog designers photonic, packaging, and digital micro‑architecture teams to integrate SerDes IP into large chiplets and optical transceiver modules.

  • Mentor junior engineers, conduct rigorous design reviews, and establish best‑practice flows for high‑speed mixed‑signal design, verification and lab characterisation.

Skills & Experience

  • 7 + years of industry experience designing production high‑speed SerDes, multi‑GHz CDRs, or comparable mixed‑signal I/O macros in advanced CMOS nodes.

  • Demonstrated success taping out > 56 Gb/s links meeting BER < 10‑12, stringent jitter masks and channel compliance specs.

  • Deep understanding of link‑level signal‑integrity, phase noise, adaptive equalisation, clock multiplication and on‑chip calibration techniques.

  • Mastery of state‑of‑the‑art EDA flows: behavioral modeling (Verilog‑A/AMS, IBIS‑AMI), transient / S‑parameter simulation, EM extraction, and mixed‑signal verification.

  • Strong measurement skills: high‑speed probing, BERT eye‑diagramming, de‑embedding, PRBS and compliance testing.

  • Bachelor’s degree in Electrical Engineering or related field (Master’s / PhD preferred).

  • Excellent cross‑disciplinary communication, problem‑solving aptitude, and a proven ability to deliver in fast‑moving, innovation‑driven environments.

  • A portfolio of patents, publications or open‑source contributions that highlights creative SerDes or high‑speed analog design insight.

Compensation & Benefits

  • $194,000 – $270,000, depending on experience, skills, and location.

  • Competitive stock options, you’re not just part of the journey, you will own a piece of it.

  • Live within 45 minutes of the office? Perfect. Live within 20 minutes? We’ll add an extra location bonus to your salary.

  • We offer financial and operational relocation support (US and abroad), through a dedicated third-party provider who is on hand to make your move as seamless as possible.

  • We offer visa sponsorship so if we make you an offer we will make every reasonable effort to secure you a visa, but we may not be able to sponsor visas for every role and candidate.

  • We’re in the process of setting up a US group policy once we have 5+ employees. In the meantime, we’re providing a health insurance stipend of $800/month to offset costs. Once the group policy is live, Flux will cover 100% of the employee premium, and offer options like dental, vision and life insurance with an aim to remain competitive among Austin tech and start up employers.

  • We offer US employees access to a 401(k) retirement savings plan and we plan to introduce an employer match in line with tech market norms (commonly in the 4-5% range). Our goal is to keep our retirement benefits competitive while we scale.

  • Top of the line, high-spec tech for everyone.

  • Sony noise-cancelling headphones and ergonomic setups to keep you comfortable and focused.

  • Personal company card to spend on tools that help you do your job - like ChatGPT Pro or anything else that boosts your workflow.

  • Periodic travel to London HQ and regular team socials.

  • 33 days of paid time off (PTO), including US federal holidays.

Due to U.S. export control regulations, candidates’ eligibility to work at Flux depends on their most recent citizenship or permanent residency status. We are generally unable to consider applicants whose most recent citizenship or permanent residence is in certain restricted countries (currently including Iran, North Korea, Syria, Cuba, Russia, Belarus, China, Hong Kong, Macau, and Venezuela). Applicants who have subsequently obtained citizenship or permanent residency in another country not subject to these restrictions may still be eligible.

We do not accept unsolicited CVs from recruitment agencies, will not be liable for any fees, and prohibit unauthorised use of our company name in recruitment activities.

Top Skills

Analog Ic Design
Bert Eye-Diagramming
Cmos
Em Extraction
High-Speed Probing
Ibis-Ami
Mixed-Signal Verification
Rf Ic Design
Transient Simulation
Verilog-A/Ams

Similar Jobs

4 Minutes Ago
In-Office
Costa Mesa, CA, USA
220K-292K Annually
Senior level
220K-292K Annually
Senior level
Aerospace • Artificial Intelligence • Hardware • Robotics • Security • Software • Defense
As a Research Engineer in Machine Learning at Anduril, you will optimize ML algorithms for edge devices, prototype LLM-based systems, and benchmark models while collaborating across business lines to identify new research problems.
Top Skills: Deep Learning ModelsMl AlgorithmsPythonPyTorchTransformer Architectures
5 Minutes Ago
In-Office
4 Locations
165K-242K Annually
Senior level
165K-242K Annually
Senior level
Cloud • Information Technology • Machine Learning
The IT SOX Director leads the company's IT SOX compliance program, focusing on IT General Controls and application controls, ensuring compliance and collaborating with various teams.
Top Skills: CoupaGitIt General Controls (Itgcs)NetSuiteSalesforceWorkday
7 Minutes Ago
Easy Apply
In-Office or Remote
3 Locations
Easy Apply
183K-216K Annually
Senior level
183K-216K Annually
Senior level
Consumer Web • Healthtech • Professional Services • Social Impact • Software
As a Conversational AI Designer, you will optimize LLM-powered support chatbot interactions, establish design standards, and drive the automation roadmap to enhance user satisfaction.
Top Skills: AIData AnalyticsLlmMachine LearningWorkflow Automation

What you need to know about the San Francisco Tech Scene

San Francisco and the surrounding Bay Area attracts more startup funding than any other region in the world. Home to Stanford University and UC Berkeley, leading VC firms and several of the world’s most valuable companies, the Bay Area is the place to go for anyone looking to make it big in the tech industry. That said, San Francisco has a lot to offer beyond technology thanks to a thriving art and music scene, excellent food and a short drive to several of the country’s most beautiful recreational areas.

Key Facts About San Francisco Tech

  • Number of Tech Workers: 365,500; 13.9% of overall workforce (2024 CompTIA survey)
  • Major Tech Employers: Google, Apple, Salesforce, Meta
  • Key Industries: Artificial intelligence, cloud computing, fintech, consumer technology, software
  • Funding Landscape: $50.5 billion in venture capital funding in 2024 (Pitchbook)
  • Notable Investors: Sequoia Capital, Andreessen Horowitz, Bessemer Venture Partners, Greylock Partners, Khosla Ventures, Kleiner Perkins
  • Research Centers and Universities: Stanford University; University of California, Berkeley; University of San Francisco; Santa Clara University; Ames Research Center; Center for AI Safety; California Institute for Regenerative Medicine

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account