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Tensordyne

Sr. ASIC EDA Workflow Engineer

Posted 3 Days Ago
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In-Office
Sunnyvale, CA, USA
Senior level
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In-Office
Sunnyvale, CA, USA
Senior level
Lead EDA tools and DevOps systems for ASIC chip design at Tensordyne, focusing on enhancing EDA workflows and technical support for a global engineering team.
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About our company - Tensordyne (formerly Recogni)

Artificial intelligence (AI) is transforming our world. It can perform cognitive functions that previously only humans could do, such as perceiving interactions across different modalities and environments - with the ability to quickly learn and then solve complex problems. Tensordyne is an AI system solution company that builds very high-performance, low-power generative AI inference systems. Our mission, through the creation of custom silicon, hardware and software, is to enable multimodal Generative AI inference acceleration at scale, with safe, sustainable, high-performance systems for our hyperscaler and neocloud data center customers. We are at the leading edge of advancing the latest research and product improvements for generative Al inference solutions that will make Al even more advantageous for compelling new generative AI applications.Tensordyne is a well funded, fast-paced startup company with headquarters in both Sunnyvale, CA, and Munich, Germany. We also have many talented team members working remotely across North America and Europe. We take care of our people and their families with comprehensive benefits, competitive compensation, flexible spending options, and recognition programs, because building category-defining technology starts with a healthy, supported team. Come join us as we shape the future of multimodal generative artificial intelligence!

The Opportunity:

In this hands-on, technology leadership role, you will lead EDA tools, DevOps systems, and associated engineering workflow development for Tensordyne's multimodal generative AI inference acceleration products. As a valued senior member of our ASIC team, you will guide and assist your colleagues to help improve and invent EDA workflows and DevOps systems within a fast-paced, agile HPC development environment that utilizes EDA tools from external companies like Cadence and as well as internally developed workflows. You will drive Tensordyne’s optimization, implementation and exploration of new EDA tools and technologies for the full ASIC chip design process. Your contributions will continuously innovate and improve scalable, reliable, high-performance systems and tools to enable the next generation of Tensordyne products. This is a hands-on role that’s ideal for ASIC EDA experts who have a multi-disciplinary engineering/DevOps background, along with a keen interest in generative AI, and a passion for designing, debugging, optimizing and finding creative EDA solutions to complex technical challenges. In this role, you will work very closely with your ASIC team members who are engaged in the design and verification of Tensordyne products, to understand and improve their workflows and EDA needs.

What you’ll bring:

  • 10+ years expert level knowledge of Linux system administration and familiarity with cloud-based devops (IaC, CaC, etc.), with experience in supporting EDA tools in a primarily cloud-based environment (as opposed to primarily on-premises).
  • Experience leading the development and support for compilation, build automation, testing, packaging and installation project generators that build object files like either CMake, GNU make, and/or Ninja, as well as experience with CI/CD and modern Git Branching workflows. 
  • Hands-on ASIC engineering experience, that includes knowledge of VLSI/SoC chip design and verification workflows, with ASIC EDA tool suites from Synopsys and/or Cadence, for physically-aware logic synthesis, RTL and gate-level simulation, structural analysis (CDC, RDC, etc.) and lint tools, ECO creation and LEC tools, and other commonly-used parts of the ASIC development ecosystem.
  • programming and debugging skills with SystemVerilog as well as with key languages to automate tasks and improve efficiency like C/C++, Perl, TCL and Python, with experience developing tools for design verification scripting as well as HDL code generators and scripts for creating hard macros from higher level descriptions.
  • Prior work experience with onboarding and supporting ASIC engineers with EDA workflows, including installation of new tool versions, FlexLM license management, and debugging/fixing issues with EDA vendors.
  • Excellent analytical, written, and verbal interpersonal skills along with an ability to productively collaborate within a global engineering team that moves at a startup pace.
  • Bachelor’s or Master's degree in Computer Science, Computer Engineering, Electrical Engineering or a related technical field.

Tensordyne's culture was built on the following values:

  • Put people first. We only succeed when our people succeed.
  • Ethics and integrity always; Being open, honest, and respectful of everyone.
  • Think Big. Be ambitious and have audacious goals.
  • Aim for excellence. Quality and excellence count in everything we do.
  • Own it and get it done. Results matter!
  • Make each person better together, than they would be as an individual.
  • Embrace each others’ differences, and embrace that there will be differences.

Tensordyne is an equal opportunity employer. We believe that a diverse team is better at tackling complex problems and coming up with innovative solutions. All qualified applicants will receive consideration for employment without regard to age, color, gender identity or expression, marital status, national origin, disability, protected veteran status, race, religion, pregnancy, sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances.

A note to Recruitment Agencies: Please don’t reach out to Tensordyne employees or leaders about our roles -- we’ve got it covered. We don’t accept unsolicited agency resumes and we are not responsible for any fees related to unsolicited resumes. Thank you for your understanding.


Top Skills

C
C++
Cadence
Ci/Cd
Cmake
Eda Tools
Git
Gnu Make
Linux
Ninja
Perl
Python
Systemverilog
Tcl
HQ

Tensordyne Sunnyvale, California, USA Office

1195 Bordeaux Dr, Sunnyvale, California, United States, 94089 1210

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