Vector Atomic Logo

Vector Atomic

Staff FPGA Engineer

Posted Yesterday
Be an Early Applicant
In-Office
Pleasanton, CA, USA
150K-180K Annually
Senior level
In-Office
Pleasanton, CA, USA
150K-180K Annually
Senior level
The Staff FPGA Engineer will design and implement FPGA systems for quantum sensors, collaborate with various engineers, and develop synthesizable RTL code.
The summary above was generated by AI

Vector Atomic, an IonQ company, is building quantum technology to transform navigation, timing, geophysical exploration, and telecommunications. Our team of engineers, scientists, software developers, and operations professionals works together to solve complex challenges and turn bold ideas into real-world solutions. We value collaboration, curiosity, and diverse perspectives, and we give every team member the opportunity to make an immediate impact while growing their skills. If you’re excited to work on breakthrough technology in a fast-paced, hands-on environment, we’d love to hear from you.

We are looking for a highly skilled Staff FPGA Engineer to join our team. The successful candidate will be instrumental in designing and implementing FPGA-based instrument systems for the next generation of advanced quantum sensors. This role initially focuses on research and development with the goal of translating prototypes into scalable commercial products. We are looking for individual contributors who can take ownership of their projects while supporting the team's overall goals. Candidates should have strong technical experience and enjoy working collaboratively in a dynamic, interdisciplinary team.


RequirementsWhat You'll Do:
  • Collaborate with physicists, electronics engineers, and optical designers to define system requirements and select appropriate FPGA/SoC components along with supporting ICs.
  • Design and contribute to custom PCB layouts integrating modern FPGA/SoC devices. Identify critical design challenges affecting PCB layouts to ensure robustness.
  • Develop synthesizable RTL code using Verilog or VHDL, create test benches, and prepare EDA tool support to meet performance targets.
  • Lead FPGA board bring-up integration and test activities. Develop test scripts. Compile validation documentation.
  • Mentor early-career engineers on best practices
  • Collaborate with the manufacturing team on the release of production-ready code.
What We're Looking For:
  • Bachelor's or Master's degree in Electrical Engineering or a related technical discipline.
  • Minimum 7 years of relevant FPGA engineering experience for candidates with EE degrees; 10+ years for other technical degrees.
  • To comply with the US export control laws, Vector Atomic employees must be U.S. citizens (born or naturalized), lawful U.S. permanent residents (green card holders), and certain categories of refugees, and asylees.
  • Proven ability to work effectively in laboratory environments.
  • Strong verbal and written communication skills.
  • Expertise in HDL programming (Verilog and/or VHDL) for synthesizable RTL and verification.
  • Experience with FPGAs with AMD Zynq and AMD Ultrascale+, including RFSoc devices.
  • Proficiency using EDA tools such as Vivado and Questa.
  • Solid understanding of hardware signal processing techniques such as digital filters, decimators, PID, etc
  • Hands-on experience with laboratory test and measurement instruments (oscilloscopes, power supplies, pulse generators, logic and protocol analyzers).
  • Ability to collaborate with hardware engineers on FPGA/SoC PCB board designs.
  • Experience writing timing constraints (SDC) to achieve timing closure on high-speed FPGA designs.
  • Familiarity with common communication protocols (SPI, I2C, AXI, Avalon, Ethernet, AMBA, Wishbone).
  • Skilled in scripting for EDA tools, preferably TCL and Python.
  • Understanding of practical RTL design issues such as latency, jitter, metastability, setup/hold timing, and multicycle paths.
  • Familiarity with revision control and issue tracking software like Git and Jira.
Preferred Expertise:
  • Experience with formal verification methodologies and languages (PSL, SystemVerilog, UVVM, UVM, or OVM).
  • Experience working with designs for challenging environmental deployments, including LEO
  • Experience creating custom Linux builds using Yocto, PetaLinux, or OpenEmbedded.
  • A background with managing CI/CD systems, virtualization and deployment technologies.

Benefits

Vector Atomic values teamwork, open and honest discourse, and work-life balance. We offer competitive compensation and benefits including:

  • Platinum-level family health coverage (medical, dental, vision)
  • Health and dependent care Flexible Spending Accounts (FSA)
  • Employer 401(k) contributions
  • 20 days of paid time off / 11 paid holidays
  • Paid parental leave
  • Fully stocked kitchen

Pay Range

The approximate base salary range for this position is $150,000 - $180,000 per year. The total compensation package includes base, bonus, equity and benefits. Please note that it is less common for candidates to be hired at the top of this range, as final compensation is determined by factors such as job-related knowledge, skills, and experience.

Vector Atomic is an equal opportunity employer and we welcome applications from all backgrounds regardless of race, color, religion, sex, national origin, ancestry, age, marital status, sexual orientation, gender identity, veteran status, disability, or any other classification protected by law.

Vector Atomic does not accept unsolicited resumes from individual recruiters or third-party recruiting agencies in response to job postings. No fee will be paid to third parties who submit unsolicited candidates directly to our hiring managers or HR team.

HQ

Vector Atomic Pleasanton, California, USA Office

5700 Stoneridge Dr, Suite 102, Pleasanton, CA, United States, 94588

Similar Jobs

Yesterday
In-Office
175K-225K Annually
Senior level
175K-225K Annually
Senior level
Aerospace • Artificial Intelligence • Hardware • Information Technology • Software • Defense • Manufacturing
The Staff FPGA/Firmware Engineer will oversee the design and verification of FPGA/SOC systems and develop HDL and embedded firmware for custom hardware.
Top Skills: C/C++Embedded LinuxFirmwareFreertosHdlLow-Level LinuxMicrochip LiberoSystemverilogVerilogVhdlXilinx Vivado
3 Days Ago
In-Office
Santa Clara, CA, USA
128K-191K Annually
Senior level
128K-191K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
The role involves designing and verifying FPGA/Firmware/Software for on-board subsystems, building simulation environments, and analyzing test results with strong collaboration across engineering teams.
Top Skills: C/C++PerlPythonSystemverilogTclUvmVerilog
4 Days Ago
In-Office
San Jose, CA, USA
160K-199K Annually
Senior level
160K-199K Annually
Senior level
3D Printing
Lead strategic marketing for the FPGA product line, drive roadmap alignment, implement go-to-market strategies, and enhance competitive positioning to boost revenue growth.
Top Skills: Electrical EngineeringFpga TechnologyProduct Marketing

What you need to know about the San Francisco Tech Scene

San Francisco and the surrounding Bay Area attracts more startup funding than any other region in the world. Home to Stanford University and UC Berkeley, leading VC firms and several of the world’s most valuable companies, the Bay Area is the place to go for anyone looking to make it big in the tech industry. That said, San Francisco has a lot to offer beyond technology thanks to a thriving art and music scene, excellent food and a short drive to several of the country’s most beautiful recreational areas.

Key Facts About San Francisco Tech

  • Number of Tech Workers: 365,500; 13.9% of overall workforce (2024 CompTIA survey)
  • Major Tech Employers: Google, Apple, Salesforce, Meta
  • Key Industries: Artificial intelligence, cloud computing, fintech, consumer technology, software
  • Funding Landscape: $50.5 billion in venture capital funding in 2024 (Pitchbook)
  • Notable Investors: Sequoia Capital, Andreessen Horowitz, Bessemer Venture Partners, Greylock Partners, Khosla Ventures, Kleiner Perkins
  • Research Centers and Universities: Stanford University; University of California, Berkeley; University of San Francisco; Santa Clara University; Ames Research Center; Center for AI Safety; California Institute for Regenerative Medicine

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account