Marvell Technology Logo

Marvell Technology

Technical Lead, Design Verification

Posted Yesterday
Be an Early Applicant
In-Office
Santa Clara, CA, USA
159K-238K Annually
Expert/Leader
In-Office
Santa Clara, CA, USA
159K-238K Annually
Expert/Leader
The Technical Lead will oversee verification strategies for SoCs, develop UVM environments, and mentor junior engineers while ensuring functional correctness through collaboration with design and architecture teams.
The summary above was generated by AI

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

Marvell's Photonic Fabric™ team is building next-generation optical interconnect technology for the era of accelerated computing. As AI workloads scale, the bottleneck has shifted from compute to interconnect bandwidth, memory bandwidth, and memory capacity. Our Photonic Fabric delivers a tenfold improvement in performance and energy efficiency deployed as optical interface chiplets, optical interposers, and Optical Multi-chip Interconnect Bridges (OMIB) that integrate into customers' AI accelerators and GPUs.
You will play a key role in ensuring our SoCs are functionally correct by defining verification strategies, developing robust UVM environments, and driving continuous improvement of our verification infrastructure. This is a team that works on complex IP and SoC verification using industry-leading verification methodologies.

What You Can Expect

  • Experience with protocols such as AMBA (AXI/AHB/APB), PCIe, Ethernet, I2C, SPI, or UART 

  • Experience with ARM/processor subsystem verification, memory controllers, NoC, or cache designs 

  • Working knowledge of C/C++ for reference modeling or firmware-driven verification 

  • Familiarity with gate-level simulation and post-silicon validation debug 

  • Experience mentoring junior verification engineers 

Education 

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 15+ years of relevant experience 

  • Or Master's degree with 10+ years of experience 

  • Or PhD with 8+ years of experience 

What We're Looking For

What You Can Expect 

  • Develop SystemVerilog/UVM verification environments for complex SoCs, from block-level IPs through full-chip integration 

  • Create detailed verification plans for block, IP, and SoC-level projects, ensuring comprehensive functional and code coverage 

  • Architect UVM testbenches including stimulus generators, scoreboards, coverage models, and constrained random sequences 

  • Collaborate closely with design, architecture, and software teams to manage milestones and ensure timely deliverables 

  • Drive continuous improvement of verification methodologies and processes across the team 

  • Build and optimize verification infrastructure regression frameworks, coverage tooling, and automation to improve efficiency 

  • Lead rigorous testbench reviews with designers, architects, and software engineers to uphold verification quality 

  • Coordinate with software and emulation teams to ensure first-pass tapeout success 

  • Use leading edge AI tools to develop infrastructure and environments effectively and efficiently 

What We're Looking For 

  • Strong proficiency in SystemVerilog with deep expertise in UVM methodology, including constrained random verification, coverage-driven techniques, and UVM library development 

  • Proven track record achieving thorough functional and code coverage closure on complex SoC or IP tapeouts 

  • Solid scripting skills in Python for verification automation, infrastructure, and tooling 

  • Experience with industry simulators such as Xcelium, Questa, or VCS 

  • Strong experience with object-oriented design and implementation 

  • Excellent communication skills with the ability to collaborate effectively across design, architecture, and software teams 

  • Experience with AI development tools 

Expected Base Pay Range (USD)

158,600 - 237,600, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements 

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at [email protected].

Interview Integrity 

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

#LI-JT2

Top Skills

Amba
C/C++
Ethernet
Pcie
Python
Systemverilog
Uvm
HQ

Marvell Technology Santa Clara, California, USA Office

5488 Marvell Ln, Santa Clara, CA, United States, 95054

Similar Jobs

6 Days Ago
Easy Apply
In-Office
San Jose, CA, USA
Easy Apply
160K-195K Annually
Senior level
160K-195K Annually
Senior level
Big Data • Information Technology
Responsible for full verification lifecycle of complex ASICs, from planning to debugging coverage measures. Collaborate with design teams and develop test plans.
Top Skills: CC++Ddr4Ddr5EthernetInfinibandNvmePci-ExpressPerlPythonSystem VerilogUsbUvm
An Hour Ago
In-Office
Palo Alto, CA, USA
249K-349K Annually
Senior level
249K-349K Annually
Senior level
Artificial Intelligence • Big Data • Cloud • Information Technology • Software • Cybersecurity • Data Privacy
The Director of Product will oversee Rubrik's core data protection capabilities, API development, and partner alliances, focusing on strategy, AI integration, and market impact.
Top Skills: AIAPIsData Lifecycle Management
3 Hours Ago
Easy Apply
Remote or Hybrid
USA
Easy Apply
100K-120K Annually
Senior level
100K-120K Annually
Senior level
Edtech • Kids + Family • Social Impact • Software
The Instructional Specialist, Multilingual Learning designs instructional frameworks, ensures content aligns with language standards, coaches internal teams, and leads research on multilingual education trends.
Top Skills: Digital Authoring ToolsGoogle Workspace

What you need to know about the San Francisco Tech Scene

San Francisco and the surrounding Bay Area attracts more startup funding than any other region in the world. Home to Stanford University and UC Berkeley, leading VC firms and several of the world’s most valuable companies, the Bay Area is the place to go for anyone looking to make it big in the tech industry. That said, San Francisco has a lot to offer beyond technology thanks to a thriving art and music scene, excellent food and a short drive to several of the country’s most beautiful recreational areas.

Key Facts About San Francisco Tech

  • Number of Tech Workers: 365,500; 13.9% of overall workforce (2024 CompTIA survey)
  • Major Tech Employers: Google, Apple, Salesforce, Meta
  • Key Industries: Artificial intelligence, cloud computing, fintech, consumer technology, software
  • Funding Landscape: $50.5 billion in venture capital funding in 2024 (Pitchbook)
  • Notable Investors: Sequoia Capital, Andreessen Horowitz, Bessemer Venture Partners, Greylock Partners, Khosla Ventures, Kleiner Perkins
  • Research Centers and Universities: Stanford University; University of California, Berkeley; University of San Francisco; Santa Clara University; Ames Research Center; Center for AI Safety; California Institute for Regenerative Medicine

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account