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Top Remote Senior Hardware Engineer Jobs in San Francisco Bay Area, CA

Reposted 10 Days AgoSaved
In-Office or Remote
Remote San Francisco Bay Area, CA
151K-223K Annually
Senior level
151K-223K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
The Senior Staff Digital ASIC Design Engineer will develop high-performance connectivity silicon and lead the design, integration, and validation of complex ASICs for data centers.
Top Skills: AsicDspEthernetFpgaSystemverilog
Reposted 15 Days AgoSaved
Easy Apply
Remote
Remote San Francisco Bay Area, CA
Easy Apply
200K-300K Annually
Senior level
200K-300K Annually
Senior level
Industrial • Manufacturing
As a Senior ASIC Front-End Design Engineer, you will oversee digital SoC design, collaborating to create automotive communication semiconductors, ensuring target performance and area goals are met.
Top Skills: C/C++MakePerlSystem VerilogTclVerilog
16 Days AgoSaved
Remote
Remote San Francisco Bay Area, CA
Senior level
Senior level
Information Technology • Consulting
Lead hardware operations and manufacturing for VotingWorks, oversee engineering and design, manage production scale-up, and enhance product quality standards.
Top Skills: Hardware OperationsManufacturingProduct Lifecycle Management (Plm)
Reposted 19 Days AgoSaved
Remote
Remote San Francisco Bay Area, CA
Senior level
Senior level
Artificial Intelligence • Hardware • Machine Learning • Natural Language Processing • Software • Generative AI
Design and implement SystemVerilog RTL for high-speed ASIC compute, memory, and networking subsystems. Define microarchitecture, optimize Power/Performance/Area, collaborate with verification/physical teams, prototype features with architects/software, mentor junior engineers, and improve design flow using AI and automation.
Top Skills: AxiClock Domain Crossing (Cdc) ToolsDdrDigital Logic Synthesis ToolsEda ToolsEthernetGitHardware Simulators/Performance Analysis ToolsHbmLinting ToolsLinux ShellLogical Equivalence Checking (Lec)PciePythonStatic Timing Analysis (Sta)SystemverilogSystemverilog Assertions (Sva)
Reposted 20 Days AgoSaved
Remote
Remote San Francisco Bay Area, CA
200K-250K Annually
Senior level
200K-250K Annually
Senior level
Hardware • Information Technology • Software
As a Senior ASIC Design Engineer, you will lead the design and implementation of critical IP blocks for AI inference systems, focusing on microarchitecture, RTL, and cross-functional collaboration while mentoring junior engineers.
Top Skills: Eda ToolsMakePythonSystemverilogTcl
Reposted 22 Days AgoSaved
Remote
Remote San Francisco Bay Area, CA
Senior level
Senior level
Artificial Intelligence
The Senior Engineer will develop AI-driven hardware models, assess SystemC simulation efficiency, and integrate modeling with EDA tools.
Top Skills: CadenceEda ToolsSiemensSynopsysSystemcVerilogVhdl
24 Days AgoSaved
Remote
Remote San Francisco Bay Area, CA
125K-150K Annually
Senior level
125K-150K Annually
Senior level
Hardware • Machine Learning • Security • Software
The Senior Hardware Solutions Engineer will optimize power consumption in hardware products, analyze performance data, and work with cross-functional teams to improve solutions.
Top Skills: Altium DesignerConfluenceLab Equipment (Power MetersMultimeters)OscilloscopesPcb DesignPython
Reposted 24 Days AgoSaved
Easy Apply
Remote
Remote San Francisco Bay Area, CA
Easy Apply
Senior level
Senior level
Computer Vision • Information Technology
Lead PCB/FPC design for consumer electronics: component placement, routing, signal and power integrity analysis, DFM, and producing fabrication/assembly packages. Manage vendors, release designs into PLM, author ECOs, and maintain ECAD libraries.
Top Skills: Agile PlmBlind ViasBomBuried ViasCadenceCadence AllegroDfmEcadEmi/EmcFlexGerberHdiMicroviasOdbPower IntegrityRigidRigid-FlexSignal IntegrityThermal Management
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