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Top Remote Senior Hardware Engineer Jobs in San Francisco Bay Area, CA

11 Days AgoSaved
Remote
Remote San Francisco Bay Area, CA
82K-140K Annually
Senior level
82K-140K Annually
Senior level
Beauty • Robotics • Design • Appliances • Manufacturing
The Senior Mechanical Engineer will design and develop consumer products, collaborate with teams, and lead mechanical engineers in creating and testing innovative technologies.
Top Skills: 3D PrintingCreoExcelMatlabMinitabSolidworks
Reposted 3 Days AgoSaved
In-Office or Remote
Remote San Francisco Bay Area, CA
Senior level
Senior level
Information Technology • Manufacturing
As a Principal Physical Design Engineer, you will lead ASIC development from RTL to GDSII, oversee design flow optimization, and ensure the delivery of high-performance products.
Top Skills: AsicEmGdsiiIrPnrPvRtlSamsungStaTsmc
7 Days AgoSaved
In-Office or Remote
Remote San Francisco Bay Area, CA
Senior level
Senior level
Angel or VC Firm • Artificial Intelligence
The Founding Head of Hardware will lead the hardware engineering function, overseeing the design, prototyping, and manufacturing processes while building a hardware team for a consumer robotics startup.
Top Skills: CadFusion 360Solidworks
Reposted 10 Days AgoSaved
In-Office or Remote
Remote San Francisco Bay Area, CA
131K-183K Annually
Senior level
131K-183K Annually
Senior level
Aerospace
The RFIC Design Engineer will design and develop advanced RF circuits for a satellite communications network, focusing on high performance and efficiency. Responsibilities include creating RF front-end components, circuit simulations, collaborating with engineers, and supporting prototype testing.
Top Skills: Asic DesignEda ToolsGaasGanRf Circuit DesignRf MeasurementsSatellite CommunicationsSemiconductor FabricationSige
Reposted YesterdaySaved
Remote
Remote San Francisco Bay Area, CA
136K-265K Annually
Senior level
136K-265K Annually
Senior level
Artificial Intelligence • Computer Vision • Hardware • Robotics • Metaverse
As a Senior DFT Engineer, you'll develop DFT architecture for AI Chips, collaborating on DFT methodologies and ensuring product quality.
Top Skills: AteJtagMbistPythonScanTcl
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2 Days AgoSaved
Remote or Hybrid
Remote San Francisco Bay Area, CA
Senior level
Senior level
Software
The Senior High-Speed Analog IC Design Engineer will develop high-speed ICs, focusing on product design, layout, verification, and testing, while collaborating with cross-functional teams.
Top Skills: Cad Scripting LanguagesCmosPythonShell ScriptsSige BicmosVeriloga
3 Days AgoSaved
Easy Apply
Remote
Remote San Francisco Bay Area, CA
Easy Apply
110K-200K Annually
Senior level
110K-200K Annually
Senior level
Kids + Family • Mobile
The Senior Hardware Engineer will design, prototype, and validate multi-radio PCBs for consumer devices, ensuring robustness and scalability. Responsibilities include circuit design, schematics, validation, and collaboration with cross-disciplinary teams.
Top Skills: Ai-Assisted Engineering ToolsAltium DesignerBleCellularData LoggersDmmsElectrical Engineering ToolsGnssOscilloscopesSoldering ToolsWifi
3 Days AgoSaved
Remote
Remote San Francisco Bay Area, CA
Senior level
Senior level
Hardware • Software • Cybersecurity
The Sr. Hardware Design Engineer leads ASIC and FPGA projects, defining architecture, guiding RTL development, and mentoring junior engineers to deliver high-quality silicon solutions.
Top Skills: IncisivePerlPythonQuestaSystemverilogTclVcs
Reposted 3 Days AgoSaved
Easy Apply
Remote
Remote San Francisco Bay Area, CA
Easy Apply
100K-500K Annually
Senior level
100K-500K Annually
Senior level
Hardware • Manufacturing
Lead and validate high-performance out-of-order RISC-V CPU designs, manage a team of verification engineers, and collaborate with architects.
Top Skills: C++PythonRisc-VSystem Verilog
4 Days AgoSaved
Easy Apply
Remote
Remote San Francisco Bay Area, CA
Easy Apply
140K-200K Annually
Senior level
140K-200K Annually
Senior level
Defense • Manufacturing
The RFIC Layout Designer will lead the implementation of RF and mixed-signal ICs, focusing on layout strategies, top-level integration, and collaborating with various teams to ensure successful silicon tapeouts.
Top Skills: Eda ToolsFinfet TechnologiesMixed-Signal Integrated CircuitsPower PlanningRficSoc Design
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