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Marvell Technology

Analog Design, Senior Staff Engineer

Reposted 2 Days Ago
Be an Early Applicant
In-Office
Santa Clara, CA
128K-192K Annually
Mid level
In-Office
Santa Clara, CA
128K-192K Annually
Mid level
As a Senior Staff Engineer, you will design and develop advanced analog circuits for high-speed applications, collaborating with cross-functional teams and leading projects.
The summary above was generated by AI

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

As an Analog Design Engineer with Marvell, you’ll be a member of the Central Engineering business group. Central Engineering organization provides most advanced and key analog IPs to all businesses within Marvell: including Data Center, Networking, Automotive, Storage, Security.
You’ll be part of a key analog team that makes an outsized impact not only the organization but also to the technological arc of innovation in the field of High Speed SerDes Links.

What You Can Expect

As an analog circuit design engineer, you will be collaborating with system architects and a global team of circuit and physical designers to build best in class serial links for various applications and space. Your work would swing between research and development geared towards circuits at bleeding edge of technology and data rates to hands-on (‘roll-up-the sleeve’) design of key analog circuits such as PLL, DLLs, ADCs, DACs CTLE/Filters, TX, RX, CDRs etc.

What We're Looking For

  • 3+ years of direct analog design experience. Experience leading a complex block or project is highly preferred.
  • Expertise in one or more of the following focus areas of analog design:  ADC/DACs, Front-Ends, CTLE, PLL, Timing circuits, CDRs, SerDes.
  • Ability to collaborate with various other design and functional teams: Layout/ Physical design, System architecture, Digital design and Validation for the successful development, release and support of complex mixed signal IPs
  • Keen eye for analog layout in latest deep submicron technologies and supervision of the same to get the key performance for high-speed design
  • Excellent debug skills to drive test plans and support validation for full cycle development of IPs and products

Expected Base Pay Range (USD)

140,350 - 210,200, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements 

At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at [email protected].

Interview Integrity
 

As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.
 
Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

#LI-TD1

Top Skills

Adcs
Analog Design
Cdrs
Ctle
Dacs
Dlls
Filters
Pll
Rx
Serdes
Tx
HQ

Marvell Technology Santa Clara, California, USA Office

5488 Marvell Ln, Santa Clara, CA, United States, 95054

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