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Intel

Compiler Engineer for AI DSLs

Reposted 4 Days Ago
In-Office
Santa Clara, CA, USA
129K-182K Annually
Junior
In-Office
Santa Clara, CA, USA
129K-182K Annually
Junior
Develop and optimize compiler tools targeting Intel CPUs, GPUs, and accelerators. Responsibilities include adding compiler features, integrating processor capabilities, maintaining LLVM, Clang, SYCL, and Fortran frameworks, debugging, performance analysis, vectorization, parallelization, benchmarking, and open-source collaboration. The role supports AI and high-performance computing applications and involves cross-functional work with hardware, validation, and global engineering teams.
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Job Details:

Job Description: 

As a Compiler Engineer, you will be at the forefront of advancing Intel's industry-leading compiler technologies. In this role, you will design, develop, optimize, and maintain cutting-edge compiler tools that unlock the full potential of Intel's processor platforms, targeting CPUs, GPUs, and accelerators. Your contributions will directly enable developers and organizations worldwide to achieve breakthroughs in AI, high-performance computing, and other transformative technologies.


Business group

The Compiler Engineering team within Intel's Data Center Group (DCG) is dedicated to creating robust software tools that empower the development of innovative and high-performing applications. The team plays an essential role in supporting Intel's broader mission to deliver scalable solutions that shape the future of computing. As part of this dynamic group, you will collaborate with global experts driving progress in compiler technology and programming languages.


Key Responsibilities

  • Develop new compiler features and optimizations tailored to Intel architectures, enhancing performance and functionality.
  • Collaborate with hardware engineering teams to support new processor features and improve compiler integration with evolving architectures.
  • Contribute to the development and maintenance of compiler frameworks such as LLVM, Clang, SYCL, and Fortran.
  • Conduct functional and performance experiments, debugging, and defect resolution to improve compiler reliability and output quality.
  • Participate in upstream collaboration with open-source communities to drive industry-wide compiler advancements.
  • Investigate opportunities for code parallelization, vectorization techniques, and performance enhancements in Intel compilers.
  • Analyze application and benchmark performance to identify and implement improvements.
  • Work closely with cross-geo engineering and validation teams to ensure quality and performance standards are met.

Behavioral traits:

  • Demonstrated success in debugging, problem-solving, and proactively seeking solutions.
  • Work independently and contribute effectively to open-source projects.

Qualifications:

This is an entry level position. You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum qualifications and are considered a plus factor in identifying top candidates. This position is not eligible for Intel immigration sponsorship.


Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.


Minimum Qualifications

  • Bachelor's degree in Computer Science, Applied Mathematics, Electronic Engineering, Informatics, or a closely related technical discipline.
  • 2+ years of experience with:
    • C/C++, SYCL, CUDA, DSLs programming, object-oriented design principles, and complex data structures.
    • Compiler technologies and LLVM compiler infrastructure.


Preferred Qualifications

  • 2+ years of experience developing and maintaining production-grade compilers.
  • Familiarity with LLVM framework components, including IR generation, passes, and backend development.
  • Experience with vectorization techniques, parallel programming models like OpenMP and SYCL, and GPU compiler optimizations.
  • Strong understanding of processor architectures, performance analysis, and memory optimizations.
  • Demonstrated experience collaborating with language standards groups or contributing to standards development.
  • Knowledge of MLIR and TileIR representation and compiler infrastructure for DSL programming languages in AI domains

Join a team that thrives on solving complex challenges and drives innovation across the computing world. Be part of Intel's mission to shape the future of technology-apply now to make an impact.

          

Job Type:College Grad

Shift:Shift 1 (United States of America)

Primary Location: US, California, Santa Clara

Additional Locations:US, Massachusetts, Beaver Brook, US, Oregon, Hillsboro, US, Texas, Austin

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.



Annual Salary Range for jobs which could be performed in the US: $128,880.00-181,940.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
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