The TI Custom BU is seeking a talented Digital Design Engineer with experience in designing complex mixed-signal devices. Come be a part of an exciting custom Digital Design Team in the ACS product line with responsibility for planning, architecting, and designing digital and mixed signal circuits for cutting-edge ASSP ICs for a marquee customer. We strive for continuous improvement in quality, efficiency, and schedule predictability using the latest design tools and methodologies. This role offers the opportunity to be a core member in a team driving flawless execution while finding innovative solutions to customers’ problems through “out of the box thinking” to deliver highly differentiated products. This individual will:
- Assist systems team in developing the system spec for the device from a digital and mixed signal point of view.
- Develop micro architecture documentation from the spec.
- Drive RTL development and verification (RTL and Gate level)
- Develop timing constraints and execute logic synthesis.
- Implement checks to develop high quality netlist for P&R.
- Run STA and review design quality from timing point of view.
- Execute Clock/Reset Domain Crossing Checks (CDC/RDC)
- Execute JasperGold auto-formal verification checks
- Drive reviews for design and verification.
- Interact with Analog team to drive chip level requirements for the digital cores.
- Be proactive in risk assessment and drive solutions to mitigate them.
- Interact with customers on requirements and refine them.
- Take an active role in mentoring team members and developing the digital design skill set in the team.
- Drive RTL design and verification flow improvement strategies.
- Must take the initiative to drive on-time first-pass success methodologies.
Minimum requirements:
- Bachelors degree in Electrical Engineering, ECE, Computer Engineering or comparable
- 8 years of engineering experience as a Design Design Engineer, including 3 years of design verification of mixed signal developments.
- Understanding of mixed-signal design and digital verification flows
- Experience in verification of timing with Gates+SDF, and timing across analog and digital boundaries.
- Experience creating and maintaining tools and scripts for automation related to design, verification, and simulation
Preferred qualifications:
- Excellent debug skills, with high attention-to-detail for both analog and digital behaviors.
- Strong leadership, communication, cross-team collaboration skills, and customer-facing skills.
- Strong analytical and problem-solving skills.
- Ability to work in a fast-paced and rapidly-changing environment.
- Engineer your future. We empower our employees to truly own their career and development. Come collaborate with some of the smartest people in the world to shape the future of electronics.
- We're different by design. Diverse backgrounds and perspectives are what push innovation forward and what make TI stronger. We value each and every voice, and look forward to hearing yours. Meet the people of TI
- Benefits that benefit you. We offer competitive pay and benefits designed to help you and your family live your best life. Your well-being is important to us. Please find our country-specific benefits here
Texas Instruments San Francisco, California, USA Office
50 Francisco St, San Francisco, CA , United States, 94133
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San Jose, United States
Texas Instruments Santa Clara, California, USA Office
Santa Clara, United States
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Sunnyvale, United States
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