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Astera Labs

Firmware Engineering Director/ Manager

Reposted 23 Hours Ago
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In-Office
San Jose, CA, USA
100K-150K Annually
Senior level
In-Office
San Jose, CA, USA
100K-150K Annually
Senior level
The Firmware Engineering Manager will oversee BootROM firmware development and simulation modeling, ensuring robust integration of security features and hardware/firmware co-design.
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Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.

Job Overview

As a Firmware Engineering Director/ Manager, you will lead and scale firmware development efforts for Astera Labs’ SoC and systems products used in data-center and AI infrastructure. You will be responsible for technical direction, people leadership, and execution across core firmware, bare-metal software, and device driver development.

Firmware is a first-class differentiator at Astera Labs. In this role, you will build, mentor, and guide high-performing firmware teams while partnering closely with hardware, silicon architecture, validation, product, and customers to ensure successful delivery of complex firmware programs.

This role supports two leadership levels:

  • Firmware Engineering Manager
  • Firmware Engineering Director

Key Responsibilities

  • Own the firmware execution strategy across one or more SoC or systems programs, ensuring alignment with product and silicon roadmaps.
  • Lead and manage firmware teams responsible for bare-metal firmware, RTOS-based firmware, and device drivers.
  • Provide technical oversight and architectural guidance without being the primary implementer.
  • Partner closely with hardware architecture, RTL design, validation, and systems teams to define HW/SW interfaces, development milestones, and integration plans.
  • Drive SoC bring-up readiness, firmware validation strategy, and risk mitigation across pre-silicon and post-silicon phases.
  • Establish development processes, coding standards, and quality metrics to ensure predictable and scalable execution.
  • Support customer engagements as needed, including escalation handling, technical reviews, and roadmap alignment.
  • Communicate status, risks, and tradeoffs clearly to executive leadership and cross-functional stakeholders.
  •  Director scope: own multi-team delivery, long-term roadmap planning, hiring strategy, and cross-org alignment across multiple product lines.

Firmware Domains Under Management

Teams under this role may span one or more of the following areas:

  • PCIe Firmware: PCIe switch and controller firmware (Gen3+), including link training, enumeration, error handling, and performance optimization.
  • Ethernet Firmware: Embedded firmware for high-speed Ethernet systems (100G–400G+), including PHY/MAC interaction and link bring-up.
  • UCIe / Chiplet Firmware: Firmware for chiplet-based SoC architectures, including die-to-die interconnect initialization and advanced packaging enablement.

Required Experience

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science.
  • 10+ years of experience developing or supporting firmware for SoC, silicon, or systems products in compute, networking, or storage domains.
  • 5+ years of experience in a people-management role, leading firmware or low-level software teams.
  • Strong understanding of bare-metal firmware, RTOS environments, and firmware development lifecycles.
  • Experience managing teams working on complex SoCs and high-speed interfaces such as PCIe, Ethernet, DDR, NVMe, or similar.
  • Proven ability to lead execution across ambiguous, fast-moving environments with multiple stakeholders.
  • Strong communication skills, executive presence, and customer-facing professionalism.
  • Authorization to work in the U.S.

Preferred Experience

  • Prior experience managing firmware teams delivering PCIe or Ethernet switch products.
  • Experience with UCIe, chiplet architectures, or advanced packaging ecosystems.
  • Track record of scaling teams through hiring, onboarding, and mentorship.
  • Experience working with or supporting customers during bring-up, deployment, or escalations.
  • Participation in industry ecosystems such as OCP or OpenBMC.
  • Director level: experience owning multi-program delivery, long-term technical roadmaps, and cross-functional organizational planning.

This position can be hired as a Senior Manager Level or Director Level. The base salary range is $230,000 USD – $265,000 USD. Your base salary will be determined based on location, experience, and employees' pay in similar positions. 

 

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

HQ

Astera Labs Santa Clara, California, USA Office

Santa Clara, CA, United States, 95054

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