ChipStack Logo

ChipStack

Formal Verification Engineer — Applying LLMs for Chip Design

Reposted One Month Ago
Be an Early Applicant
In-Office
San Jose, CA, USA
Mid level
In-Office
San Jose, CA, USA
Mid level
The Formal Verification Engineer will develop innovative AI-driven solutions for chip design, employing formal methods and collaborating with ML and software teams.
The summary above was generated by AI
About Us

Chips are at the center of today's tech-driven world. But how we design them has not changed in decades, while their complexity and specialization have skyrocketed due to increasing performance demands from applications like AI. We want to change that.

Our team is small, technical, and fast-moving. We’ve built and shipped at the intersection of AI, EDA, and systems software, with deep roots at companies like Qualcomm, Nvidia, Google, Meta, and the Allen Institute for AI. We’re backed by top investors including Khosla Ventures, Cerberus, and Clear Ventures, and already deployed with 10+ innovative customers—from Fortune 100s to cutting-edge AI silicon startups.

About This Role

We are looking for an experienced Formal Verification Engineer to join our dynamic team. Ideal candidate has experience with all aspects of Formal Verification — SVA, Property Verification, Formal Methods/Abstractions, Methodology and scripting. You will work on developing Chipstack’s Revolutionary Formal Verification Agent, directly impacting the tool quality and features.

You will work alongside highly experienced chip designers who have built complex chips, ML scientists who have trained LLMs at scale, and top-notch infrastructure and software engineers. You will leverage your experience in Formal Verification to build the next generation of AI-enabled Verification tools.

Key Responsibilities:
  • Collaborate with ML and software teams to develop advanced, AI-driven chip design / Formal Verification solutions.

  • Learn from and work closely with strong ML leads to understand and implement cutting-edge technologies in chip design.

  • Engage directly with customer projects, applying your expertise to develop practical and innovative solutions.

  • Contribute to the integration of LLM technologies into the chip design process, enhancing design efficiency and performance.

  • Stay updated with the latest advancements in chip design and AI/ML technologies to continually improve methodologies and solutions.

Qualifications:

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.

  • Strong experience in Formal Verification.

    • You have implemented complex Formal Verification testbenches using Formal Methods.

    • Proficient in SVA and SystemVerilog. Experience with industry standard tools (JasperGold, VCFormal, Verdi)

  • Solid programming skills (e.g., Python, C/C++, Verilog, SystemVerilog).

  • Experience or interest in AI/ML technologies, especially in the context of LLMs, is highly desirable.

  • Strong problem-solving abilities and a proactive attitude toward learning and innovation.

  • Excellent communication skills and the ability to work effectively in a team-oriented environment.

  • You are self-motivated and driven. You are not afraid of difficult problems and enjoy venturing into areas you have not explored before.

Why Join Us?

As a young startup funded by top VCs in Silicon Valley, this is a unique opportunity that you can’t really get anywhere else:

  • Personal impact — The opportunity to build something from the ground up and define a new product for an industry that is at the core of the modern technological revolution.

  • Access to unique learning opportunities — With the Allen Institute for AI (AI2) as a co-founder, our team gets access to numerous talks by leading AI researchers/paper authors, knowledge sharing amongst the community of hundreds of engineers working for AI2 companies, and much more. As a part of the multi-disciplinary team, you get to interact with people from very different backgrounds (from chip design to AI to software engineers).

  • Founding title — You will be one of our first hires. For the rest of our days, no matter how many thousands of people join after you, you will always have that honor and distinction.

  • Early-stage equity — Early-stage risk comes with early-stage equity for you. And none of us would be here if we didn’t think our company would create tremendous value over time.

  • Benefits — In spite of being an early-stage company, taking care of our team is a priority for us. From health insurance to catered lunches, we continue to add unique benefits.

HQ

ChipStack Campbell, California, USA Office

33 N 1st St, Campbell, CA, United States, 95008

Similar Jobs

An Hour Ago
In-Office or Remote
United States
Senior level
Senior level
Big Data • Information Technology • Software • Analytics • Energy
Own the conversion of manual regression suites into automated tests for CAD-based desktop and Revit-integrated applications using T-Plan Robot. Design reusable test frameworks, execute and analyze automated tests, document defects, and maintain CI/CD integrations. Apply AI and LLM tools with validation workflows to improve test authoring and reliability. Collaborate with developers and product owners, track coverage and defect trends, and eventually expand automation frameworks and mentorship across other product teams.
Top Skills: AIAutocadAutodesk RevitAzure DevopsCi/CdGithub ActionsInventorLlmsNunitPostmanSeleniumSQLSwaggerT-Plan RobotWinappdriver
An Hour Ago
Hybrid
24-24 Hourly
Internship
24-24 Hourly
Internship
Fintech • Information Technology • Insurance • Financial Services • Big Data Analytics
Supports the group benefits sales organization through training, customer meeting participation, sales technology exposure, and assigned business duties. Completes weekly curriculum and collaborates on an intern-led capstone project, presenting results to peers, managers, and senior leadership. The internship develops business acumen, interpersonal skills, leadership, analytical abilities, and B2B sales knowledge while providing networking opportunities and exposure to insurance products and services.
Top Skills: ExcelSalesforce
3 Hours Ago
Remote or Hybrid
United States
100K-160K Annually
Senior level
100K-160K Annually
Senior level
Artificial Intelligence • Cloud • Payments • Software • Business Intelligence • Generative AI • Automation
Leads the HR technology strategy, roadmap, and HRIS team. Oversees UKG Pro, workforce management, benefits administration, system integrations, HR data infrastructure, security, governance, and reporting. Partners with IT, Data, Finance, Recruiting, Compensation, and People Operations on implementations, acquisitions, and technology initiatives. Establishes scalable processes and documentation while developing HRIS professionals and external partners.
Top Skills: Benefits AdministrationHr System IntegrationsHrisUkg ProWorkforce Management (Wfm)

What you need to know about the San Francisco Tech Scene

San Francisco and the surrounding Bay Area attracts more startup funding than any other region in the world. Home to Stanford University and UC Berkeley, leading VC firms and several of the world’s most valuable companies, the Bay Area is the place to go for anyone looking to make it big in the tech industry. That said, San Francisco has a lot to offer beyond technology thanks to a thriving art and music scene, excellent food and a short drive to several of the country’s most beautiful recreational areas.

Key Facts About San Francisco Tech

  • Number of Tech Workers: 365,500; 13.9% of overall workforce (2024 CompTIA survey)
  • Major Tech Employers: Google, Apple, Salesforce, Meta
  • Key Industries: Artificial intelligence, cloud computing, fintech, consumer technology, software
  • Funding Landscape: $50.5 billion in venture capital funding in 2024 (Pitchbook)
  • Notable Investors: Sequoia Capital, Andreessen Horowitz, Bessemer Venture Partners, Greylock Partners, Khosla Ventures, Kleiner Perkins
  • Research Centers and Universities: Stanford University; University of California, Berkeley; University of San Francisco; Santa Clara University; Ames Research Center; Center for AI Safety; California Institute for Regenerative Medicine

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account