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Bolt Graphics

Intern - Vector Compute Architect

Posted 24 Days Ago
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In-Office
Sunnyvale, CA, USA
Internship
In-Office
Sunnyvale, CA, USA
Internship
The Vector Compute Architect Intern will assist in defining and optimizing vector compute architectures for AI and GPU platforms, collaborate with various teams, and lead performance modeling.
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Bolt Graphics is a semiconductor startup based in Sunnyvale, CA building the fastest and most efficient graphics processors. We pride ourselves on our first principles approach to solving problems. We are energized by our mission to reduce the barrier of entry for content creation and consumption. Our goal is to enable everyone to easily create, simulate and consume immersive experiences as vividly as they can imagine them.

Our Values

  • Be Fearless: Unmute yourself. Test boundaries and get proven right.
  • Remain Adaptable: Stay comfortable in a continuously changing world. If you’re wrong, concede and move on.
  • Educate Your Ego: Selflessly collaborate towards our shared purpose.

About the role:

We are looking for an initiative-taking Vector Compute Architect Intern to join our advanced architecture team working on next-generation AI, GPU, and high-performance computer platforms. This role focuses on defining and optimizing vector compute architectures for graphics and scientific computing workloads. 

The ideal candidate is pursuing an MS or PhD in Computer Engineering, Electrical Engineering, Computer Science, or a related field, with strong background in computer architecture, parallel processing, and performance modeling. 

Ideal candidate must be able to travel to our Sunnyvale office for the duration of the internship. The role is hybrid.

Out of state candidates will be considered. The company will not cover for any travel expenses.

What you'll do:

  • Define data parallel microarchitecture satisfying ISA constraints. 
  • Drive architecture tradeoff analysis for performance, power, area, bandwidth, latency, and scalability.  
  • Develop and review system architecture specifications, interface definitions, and microarchitecture requirements.  
  • Collaborate with RTL, verification, physical design, firmware, software, and system teams throughout the development cycle.  
  • Lead performance modeling, workload analysis, and bottleneck identification using C/C++/SystemC or similar modeling environments.  
  • Define memory hierarchy, coherency architecture, and cache structures.  
  • Work closely with verification teams to define architectural test plans and validation strategies.  
  • Support silicon bring-up, debug, performance tuning, and post-silicon optimization.  
  • Contribute to long-term technology and product roadmap planning.  

Qualifications:

  • Pursuing an MS or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.  
  • Proven work experience in (preferably published):  
  • Workload characterization and profiling  
  • Performance modeling  
  • Out-of-order data dependency and control  
  • Utilization / occupancy optimization  
  • High-performance architecture design techniques 

Experience with one or more of the following:  

  • CPU/GPU/NPU architectures  
  • NoC/interconnect architectures  
  • Cache coherency protocols (CHI/ACE/CXL)  
  • High-speed interfaces (PCIe, UCIe, Ethernet)  
  • Memory systems (DDR, LPDDR, HBM, GDDR)  
  • Power, performance, and area optimization  
  • Strong knowledge of RTL development and verification methodologies.  
  • Experience with architecture modeling and performance analysis tools.  
  • Familiarity with firmware/software interaction in complex SoC systems.  
  • Excellent problem-solving, communication, and leadership skills.   

What You Will Gain 

  • Hands-on experience working on cutting-edge vector compute.  
  • Opportunity to collaborate with experienced architecture, software, firmware, and silicon design teams.  
  • Exposure to full-chip architecture trade-offs in advanced process technologies.  
  • Real-world experience in next-generation GPU system development.  

Preferred Skills 

  • Strong communication and technical presentation skills.  
  • Self-driven and capable of working in a fast-paced startup or research-oriented environment.  
  • Passion for AI, GPUs, high-performance computing, and advanced semiconductor technologies. 

Compensation Range: $40 per hour (California). This range represents the anticipated base pay for this role; the final offer may vary based on qualifications, experience, and location.


Bolt is committed to building a diverse and inclusive environment in which we recognize and value each other’s differences as well as fostering a culture that promotes its core values: Professionalism, Integrity, and Respect. As an equal opportunity employer, all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, genetic information, national origin, age, disability, or status as a protected veteran.

HQ

Bolt Graphics Sunnyvale, California, USA Office

440 N Wolfe Rd, Sunnyvale, CA , United States, 94085

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